V4L/DVB (13146): gspca_ov519: cleanup sensor handling
There were various "if (sensor == foo)" pieces of code inside ov519.c, move these bits to the sensor specific init functions, where they belong. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
This commit is contained in:
Hans de Goede
Mauro Carvalho Chehab
parent
b46aaa0264
commit
ebbb5c3e0e
@ -3501,7 +3501,8 @@ static int ov519_mode_init_regs(struct sd *sd)
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static int mode_init_ov_sensor_regs(struct sd *sd)
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{
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struct gspca_dev *gspca_dev;
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int qvga;
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int qvga, xstart, xend, ystart, yend;
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__u8 v;
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gspca_dev = &sd->gspca_dev;
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qvga = gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv & 1;
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@ -3517,9 +3518,7 @@ static int mode_init_ov_sensor_regs(struct sd *sd)
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i2c_w_mask(sd, 0x67, qvga ? 0xf0 : 0x90, 0xf0);
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i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
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return 0;
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case SEN_OV3610: {
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int xstart, xend, ystart, yend;
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case SEN_OV3610:
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if (qvga) {
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xstart = (1040 - gspca_dev->width) / 2 + (0x1f << 4);
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ystart = (776 - gspca_dev->height) / 2;
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@ -3543,13 +3542,19 @@ static int mode_init_ov_sensor_regs(struct sd *sd)
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i2c_w(sd, 0x19, ystart >> 3);
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i2c_w(sd, 0x1a, yend >> 3);
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return 0;
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}
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case SEN_OV8610:
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/* For OV8610 qvga means qsvga */
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i2c_w_mask(sd, OV7610_REG_COM_C, qvga ? (1 << 5) : 0, 1 << 5);
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i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
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i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
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i2c_w_mask(sd, 0x2d, 0x00, 0x40); /* from windrv 090403 */
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i2c_w_mask(sd, 0x28, 0x20, 0x20); /* progressive mode on */
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break;
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case SEN_OV7610:
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i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
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i2c_w(sd, 0x35, qvga?0x1e:0x9e);
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i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
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i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
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break;
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case SEN_OV7620:
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case SEN_OV76BE:
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@ -3560,6 +3565,10 @@ static int mode_init_ov_sensor_regs(struct sd *sd)
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i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
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i2c_w_mask(sd, 0x67, qvga ? 0xb0 : 0x90, 0xf0);
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i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
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i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
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i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
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if (sd->sensor == SEN_OV76BE)
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i2c_w(sd, 0x35, qvga ? 0x1e : 0x9e);
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break;
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case SEN_OV7640:
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i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
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@ -3569,6 +3578,7 @@ static int mode_init_ov_sensor_regs(struct sd *sd)
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/* i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40); */
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/* i2c_w_mask(sd, 0x67, qvga ? 0xf0 : 0x90, 0xf0); */
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/* i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20); */
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i2c_w_mask(sd, 0x12, 0x04, 0x04); /* AWB: 1 */
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break;
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case SEN_OV7670:
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/* set COM7_FMT_VGA or COM7_FMT_QVGA
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@ -3577,55 +3587,56 @@ static int mode_init_ov_sensor_regs(struct sd *sd)
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i2c_w_mask(sd, OV7670_REG_COM7,
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qvga ? OV7670_COM7_FMT_QVGA : OV7670_COM7_FMT_VGA,
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OV7670_COM7_FMT_MASK);
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i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
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i2c_w_mask(sd, OV7670_REG_COM8, OV7670_COM8_AWB,
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OV7670_COM8_AWB);
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if (qvga) { /* QVGA from ov7670.c by
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* Jonathan Corbet */
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xstart = 164;
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xend = 28;
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ystart = 14;
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yend = 494;
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} else { /* VGA */
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xstart = 158;
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xend = 14;
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ystart = 10;
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yend = 490;
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}
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/* OV7670 hardware window registers are split across
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* multiple locations */
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i2c_w(sd, OV7670_REG_HSTART, xstart >> 3);
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i2c_w(sd, OV7670_REG_HSTOP, xend >> 3);
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v = i2c_r(sd, OV7670_REG_HREF);
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v = (v & 0xc0) | ((xend & 0x7) << 3) | (xstart & 0x07);
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msleep(10); /* need to sleep between read and write to
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* same reg! */
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i2c_w(sd, OV7670_REG_HREF, v);
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i2c_w(sd, OV7670_REG_VSTART, ystart >> 2);
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i2c_w(sd, OV7670_REG_VSTOP, yend >> 2);
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v = i2c_r(sd, OV7670_REG_VREF);
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v = (v & 0xc0) | ((yend & 0x3) << 2) | (ystart & 0x03);
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msleep(10); /* need to sleep between read and write to
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* same reg! */
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i2c_w(sd, OV7670_REG_VREF, v);
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break;
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case SEN_OV6620:
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i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
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i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
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i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
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break;
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case SEN_OV6630:
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case SEN_OV66308AF:
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i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
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i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
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break;
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default:
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return -EINVAL;
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}
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/******** Palette-specific regs ********/
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/* The OV518 needs special treatment. Although both the OV518
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* and the OV6630 support a 16-bit video bus, only the 8 bit Y
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* bus is actually used. The UV bus is tied to ground.
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* Therefore, the OV6630 needs to be in 8-bit multiplexed
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* output mode */
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/* OV7640 is 8-bit only */
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if (sd->sensor != SEN_OV6630 && sd->sensor != SEN_OV66308AF &&
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sd->sensor != SEN_OV7640)
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i2c_w_mask(sd, 0x13, 0x00, 0x20);
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/******** Clock programming ********/
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i2c_w(sd, 0x11, sd->clockdiv);
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/******** Special Features ********/
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/* no evidence this is possible with OV7670, either */
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/* Test Pattern */
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if (sd->sensor != SEN_OV7640 && sd->sensor != SEN_OV7670)
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i2c_w_mask(sd, 0x12, 0x00, 0x02);
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/* Enable auto white balance */
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if (sd->sensor == SEN_OV7670)
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i2c_w_mask(sd, OV7670_REG_COM8, OV7670_COM8_AWB,
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OV7670_COM8_AWB);
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else
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i2c_w_mask(sd, 0x12, 0x04, 0x04);
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/* This will go away as soon as ov51x_mode_init_sensor_regs() */
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/* is fully tested. */
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/* 7620/6620/6630? don't have register 0x35, so play it safe */
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if (sd->sensor == SEN_OV7610 || sd->sensor == SEN_OV76BE) {
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if (!qvga)
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i2c_w(sd, 0x35, 0x9e);
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else
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i2c_w(sd, 0x35, 0x1e);
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}
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return 0;
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}
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@ -3648,11 +3659,11 @@ static int set_ov_sensor_window(struct sd *sd)
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struct gspca_dev *gspca_dev;
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int qvga, crop;
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int hwsbase, hwebase, vwsbase, vwebase, hwscale, vwscale;
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int ret, hstart, hstop, vstop, vstart;
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__u8 v;
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int ret;
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/* mode setup is fully handled in mode_init_ov_sensor_regs for these */
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if (sd->sensor == SEN_OV2610 || sd->sensor == SEN_OV3610)
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if (sd->sensor == SEN_OV2610 || sd->sensor == SEN_OV3610 ||
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sd->sensor == SEN_OV7670)
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return mode_init_ov_sensor_regs(sd);
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gspca_dev = &sd->gspca_dev;
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@ -3701,11 +3712,6 @@ static int set_ov_sensor_window(struct sd *sd)
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hwebase = 0x1a;
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vwsbase = vwebase = 0x03;
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break;
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case SEN_OV7670:
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/*handling of OV7670 hardware sensor start and stop values
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* is very odd, compared to the other OV sensors */
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vwsbase = vwebase = hwebase = hwsbase = 0x00;
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break;
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default:
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return -EINVAL;
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}
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@ -3746,58 +3752,11 @@ static int set_ov_sensor_window(struct sd *sd)
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if (ret < 0)
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return ret;
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if (sd->sensor == SEN_OV8610) {
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i2c_w_mask(sd, 0x2d, 0x05, 0x40);
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/* old 0x95, new 0x05 from windrv 090403 */
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/* bits 5-7: reserved */
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i2c_w_mask(sd, 0x28, 0x20, 0x20);
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/* bit 5: progressive mode on */
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}
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i2c_w(sd, 0x17, hwsbase);
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i2c_w(sd, 0x18, hwebase + (sd->gspca_dev.width >> hwscale));
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i2c_w(sd, 0x19, vwsbase);
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i2c_w(sd, 0x1a, vwebase + (sd->gspca_dev.height >> vwscale));
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/* The below is wrong for OV7670s because their window registers
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* only store the high bits in 0x17 to 0x1a */
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/* SRH Use sd->max values instead of requested win values */
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/* SCS Since we're sticking with only the max hardware widths
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* for a given mode */
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/* I can hard code this for OV7670s */
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/* Yes, these numbers do look odd, but they're tested and work! */
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if (sd->sensor == SEN_OV7670) {
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if (qvga) { /* QVGA from ov7670.c by
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* Jonathan Corbet */
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hstart = 164;
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hstop = 28;
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vstart = 14;
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vstop = 494;
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} else { /* VGA */
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hstart = 158;
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hstop = 14;
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vstart = 10;
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vstop = 490;
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}
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/* OV7670 hardware window registers are split across
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* multiple locations */
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i2c_w(sd, OV7670_REG_HSTART, hstart >> 3);
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i2c_w(sd, OV7670_REG_HSTOP, hstop >> 3);
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v = i2c_r(sd, OV7670_REG_HREF);
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v = (v & 0xc0) | ((hstop & 0x7) << 3) | (hstart & 0x07);
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msleep(10); /* need to sleep between read and write to
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* same reg! */
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i2c_w(sd, OV7670_REG_HREF, v);
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i2c_w(sd, OV7670_REG_VSTART, vstart >> 2);
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i2c_w(sd, OV7670_REG_VSTOP, vstop >> 2);
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v = i2c_r(sd, OV7670_REG_VREF);
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v = (v & 0xc0) | ((vstop & 0x3) << 2) | (vstart & 0x03);
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msleep(10); /* need to sleep between read and write to
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* same reg! */
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i2c_w(sd, OV7670_REG_VREF, v);
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} else {
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i2c_w(sd, 0x17, hwsbase);
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i2c_w(sd, 0x18, hwebase + (sd->gspca_dev.width >> hwscale));
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i2c_w(sd, 0x19, vwsbase);
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i2c_w(sd, 0x1a, vwebase + (sd->gspca_dev.height >> vwscale));
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}
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return 0;
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}
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