Commit Graph

287 Commits

Author SHA1 Message Date
Paul Mackerras
4acadb965c Merge branch 'for-2.6.24' of git://git.secretlab.ca/git/linux-2.6-mpc52xx into merge 2007-10-17 22:31:13 +10:00
Sylvain Munaut
7acb939130 [POWERPC] bestcomm: GenBD task support
This is the microcode for the GenBD task and the associated
support code. This is a generic task that copy data to/from
a hardware FIFO. This is currently locked to 32bits wide
access but could be extended as needed.

The microcode itself comes directly from the offical
API (v2.2)

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2007-10-16 17:09:56 -06:00
Sylvain Munaut
ba11c79aba [POWERPC] bestcomm: FEC task support
This is the microcode for the FEC task and the associated
support code.

The microcode itself comes directly from the offical
API (v2.2)

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2007-10-16 17:09:49 -06:00
Sylvain Munaut
9ea68df515 [POWERPC] bestcomm: ATA task support
This is the microcode for the ATA task and the associated
support code.

The microcode itself comes directly from the offical
API (v2.2)

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2007-10-16 17:09:42 -06:00
Sylvain Munaut
2f9ea1bde0 [POWERPC] bestcomm: core bestcomm support for Freescale MPC5200
This patch adds support for the core of the BestComm API
for the Freescale MPC5200(b). The BestComm engine is a
microcode-controlled / tasks-based DMA used by several
of the onchip devices.

Setting up the tasks / memory allocation and all common
low level functions are handled by this patch.
The specifics details of each tasks and their microcode
are split-out in separate patches.

This is not the official API, but a much cleaner one.
(hopefully)

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2007-10-16 17:09:34 -06:00
Tony Li
01db9953a7 [POWERPC] Add missing semicolon for fsl_pci.c
Signed-off-by: Tony Li <tony.li@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-16 09:06:43 -05:00
Michael Ellerman
cdbd3865ac Use dcr_host_t.base in dcr_unmap()
With the base stored in dcr_host_t, there's no need for callers to pass
the dcr_n into dcr_unmap(). In fact this removes the possibility of them
passing the incorrect value, which would then be iounmap()'ed.

Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-10-15 14:29:49 -04:00
Michael Ellerman
83f34df4e7 Add dcr_host_t.base in dcr_read()/dcr_write()
Now that all users of dcr_read()/dcr_write() add the dcr_host_t.base, we
can save them the trouble and do it in dcr_read()/dcr_write().

As some background to why we just went through all this jiggery-pokery,
benh sayeth:

 Initially the goal of the dcr_read/dcr_write routines was to operate like
 mfdcr/mtdcr which take absolute DCR numbers. The reason is that on 4xx
 hardware, indirect DCR access is a pain (goes through a table of
 instructions) and it's useful to have the compiler resolve an absolute DCR
 inline.

 We decided that wasn't worth the API bastardisation since most places
 where absolute DCR values are used are low level 4xx-only code which may
 as well continue using mfdcr/mtdcr, while the new API is designed for
 device "instances" that can exist on 4xx and Axon type platforms and may
 be located at variable DCR offsets.

Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-10-15 14:29:49 -04:00
Al Viro
d81fec0f97 missed bio_endio() in axonram
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-10-11 23:04:25 -07:00
Valentine Barshak
d94bad827d [POWERPC] PCI: Add 64-bit physical address support to setup_indirect_pci
Add 64-bit physical address support to setup_indirect_pci().

Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-10-12 14:05:17 +10:00
Josh Boyer
0a2cdd88f0 Merge branch 'virtex-for-2.6.24' of git://git.secretlab.ca/git/linux-2.6-virtex into for-2.6.24-4xx 2007-10-11 07:45:20 -05:00
Stephen Rothwell
84dd4676f5 [POWERPC] Move of_platform_driver initialisations: arch/powerpc
We no longer initialise the name and owner fields of the
of_platform_driver, but use the fields of the embedded device_driver's
name field instead.

Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-10-11 20:40:49 +10:00
Grant Likely
4c3d514d7e [POWERPC] Don't build arch/powerpc/sysdev/dcr.c for ARCH=ppc kernels
dcr.c is an arch/powerpc only thing.  Compiling ppc405 arch/ppc kernels
throws warnings without this change.

Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2007-10-10 09:14:35 -06:00
Peter Korsgaard
082ea86fce [POWERPC] spi: Support non-QE processors
On non-QE processors (mpc831x/mpc834x) the SPI clock is the SoC clock.

Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-08 09:05:30 -05:00
Anton Vorontsov
321872dcc0 [POWERPC] QE: pario - support for MPC85xx layout
8 bytes padding required to match MPC85xx registers layout.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Reviewed-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-08 08:39:01 -05:00
Anton Vorontsov
cccd21027c [POWERPC] QEIC: Implement pluggable handlers, fix MPIC cascading
set_irq_chained_handler overwrites MPIC's handle_irq function
(handle_fasteoi_irq) thus MPIC never gets eoi event from the
cascaded IRQ. This situation hangs MPIC on MPC8568E.

To solve this problem efficiently, QEIC needs pluggable handlers,
specific to the underlaying interrupt controller.

Patch extends qe_ic_init() function to accept low and high interrupt
handlers. To avoid #ifdefs, stack of interrupt handlers specified in
the header file and functions are marked 'static inline', thus
handlers are compiled-in only if actually used (in the board file).
Another option would be to lookup for parent controller and
automatically detect handlers (will waste text size because of
never used handlers, so this option abolished).

qe_ic_init() also changed in regard to support multiplexed high/low
lines as found in MPC8568E-MDS, plus qe_ic_cascade_muxed_mpic()
handler implemented appropriately.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-08 08:38:57 -05:00
Kumar Gala
e1c1575f83 [POWERPC] 85xx/86xx: refactor RSTCR reset code
On the majority of 85xx & 86xx we have a register that's ability to
assert HRESET_REQ to reset the board.  We refactored that code so it
can be shared between both platforms into fsl_soc.c and removed all
the duplication in each platform directory.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-08 08:38:47 -05:00
Kumar Gala
2fce1225af [POWERPC] FSL: Access PCIe LTSSM register with correct size
The LTSSM register is actual 32-bits wide so we should be doing a
dword access.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-08 08:38:37 -05:00
Jason Jin
61c5d3cde1 [POWERPC] Treat 8610 PCIe host bridge as transparent
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-08 08:38:26 -05:00
Timur Tabi
6b0b594bb8 [POWERPC] qe: miscellaneous code improvements and fixes to the QE library
This patch makes numerous miscellaneous code improvements to the QE library.

1. Remove struct ucc_common and merge ucc_init_guemr() into ucc_set_type()
   (every caller of ucc_init_guemr() also calls ucc_set_type()).  Modify all
   callers of ucc_set_type() accordingly.

2. Remove the unused enum ucc_pram_initial_offset.

3. Refactor qe_setbrg(), also implement work-around for errata QE_General4.

4. Several printk() calls were missing the terminating \n.

5. Add __iomem where needed, and change u16 to __be16 and u32 to __be32 where
   appropriate.

6. In ucc_slow_init() the RBASE and TBASE registers in the PRAM were programmed
   with the wrong value.

7. Add the protocol type to struct us_info and updated ucc_slow_init() to
   use it, instead of always programming QE_CR_PROTOCOL_UNSPECIFIED.

8. Rename ucc_slow_restart_x() to ucc_slow_restart_tx()

9. Add several macros in qe.h (mostly for slow UCC support, but also to
   standardize some naming convention) and remove several unused macros.

10. Update ucc_geth.c to use the new macros.

11. Add ucc_slow_info.protocol to specify which QE_CR_PROTOCOL_xxx protcol
    to use when initializing the UCC in ucc_slow_init().

12. Rename ucc_slow_pram.rfcr to rbmr and ucc_slow_pram.tfcr to tbmr, since
    these are the real names of the registers.

13. Use the setbits, clrbits, and clrsetbits where appropriate.

14. Refactor ucc_set_qe_mux_rxtx().

15. Remove all instances of 'volatile'.

16. Simplify get_cmxucr_reg();

17. Replace qe_mux.cmxucrX with qe_mux.cmxucr[].

18. Updated struct ucc_geth because struct ucc_fast is not padded any more.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-08 08:38:15 -05:00
Anton Vorontsov
c0e4eb2d8a [POWERPC] MPC8568E-MDS: add support for ds1374 rtc
MPC8568E-MDS have DS1374 chip on the I2C bus, thus let's use it.
This patch also adds #address-cells and #size-cells to the I2C
controllers nodes.

p.s. DS1374 rtc class driver is in the -mm tree, its name is
rtc-rtc-class-driver-for-the-ds1374.patch.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-04 15:47:25 -05:00
Anton Vorontsov
da1bb3a0e1 [POWERPC] fsl_soc: fix uninitialized i2c_board_info structure
i2c_board_info used semi-initialized, causing garbage in the
info->flags, and that, in turn, causes various symptoms of i2c
malfunctioning, like PEC mismatches.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-04 15:47:23 -05:00
Scott Wood
15f8c604a7 [POWERPC] cpm: Describe multi-user ram in its own device node.
The way the current CPM binding describes available multi-user (a.k.a.
dual-ported) RAM doesn't work well when there are multiple free regions,
and it doesn't work at all if the region doesn't begin at the start of
the muram area (as the hardware needs to be programmed with offsets into
this area).  The latter situation can happen with SMC UARTs on CPM2, as its
parameter RAM is relocatable, u-boot puts it at zero, and the kernel doesn't
support moving it.

It is now described with a muram node, similar to QE.  The current CPM
binding is sufficiently recent (i.e. never appeared in an official release)
that compatibility with existing device trees is not an issue.

The code supporting the new binding is shared between cpm1 and cpm2, rather
than remain separated.  QE should be able to use this code as well, once
minor fixes are made to its device trees.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-04 15:47:05 -05:00
Peter Korsgaard
0438c28fa4 [POWERPC] fsl_soc: rtc-ds1307 support
Add support for the I2C devices handled by the rtc-ds1307 driver to
of_register_i2c_devices.

Cc: G. Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-04 11:03:00 -05:00
Peter Korsgaard
210805e219 [POWERPC] fsl_soc: Fix trivial printk typo.
Fix a trivial printk typo in fsl_soc.

Cc: G. Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-04 11:02:57 -05:00
Scott Wood
7f21f52940 [POWERPC] cpm2: Add cpm2_set_pin().
This provides a generic way for board code to set up CPM pins, rather
than directly poking magic values into registers.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-04 11:02:18 -05:00
Scott Wood
2652d4ec4a [POWERPC] cpm2: Add SCCs to cpm2_clk_setup(), and cpm2_smc_clk_setup().
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-04 11:02:14 -05:00
Scott Wood
449012daa9 [POWERPC] cpm2: Infrastructure code cleanup.
Mostly sparse fixes (__iomem annotations, etc); also, cpm2_immr
is used rather than creating many temporary mappings.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-04 11:02:04 -05:00
Scott Wood
663edbd264 [POWERPC] 8xx: Add pin and clock setting functions.
These let board code set up pins and clocks without having to
put magic numbers directly into the registers.

The clock function is mostly duplicated from the cpm2 version;
hopefully this stuff can be merged at some point.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-03 20:36:36 -05:00
Scott Wood
fb533d0c5a [POWERPC] 8xx: Infrastructure code cleanup.
1. Keep a global mpc8xx_immr mapping, rather than constantly
creating temporary mappings.
2. Look for new fsl,cpm1 and fsl,cpm1-pic names.
3. Always reset the CPM when not using the udbg console;
this is required in case the firmware initialized a device
that is incompatible with one that the kernel is about to
use.
4. Remove some superfluous casts and header includes.
5. Change a usage of IMAP_ADDR to get_immrbase().
6. Use phys_addr_t, not uint, for dpram_pbase.
7. Various sparse-related fixes, such as __iomem annotations.
8. Remove mpc8xx_show_cpuinfo, which doesn't provide anything
useful beyond the generic cpuinfo handler.
9. Move prototypes for 8xx support functions from board files
to sysdev/commproc.h.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-03 20:36:35 -05:00
Scott Wood
c374e00e17 [POWERPC] Add early debug console for CPM serial ports.
This code assumes that the ports have been previously set up, with
buffers in DPRAM.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-03 20:35:43 -05:00
Scott Wood
e631ae3b16 [POWERPC] Introduce new CPM device bindings.
This introduces a new device binding for the CPM and other devices on
these boards.  Some of the changes include:

1. Proper namespace scoping for Freescale compatibles and properties.

2. Use compatible rather than things like device_type and model
to determine which particular variant of a device is present.

3. Give the drivers the relevant CPM command word directly, rather than
requiring it to have a lookup table based on device-id, SCC v. SMC, and
CPM version.

4. Specify the CPCR and the usable DPRAM region in the CPM's reg property.

Boards that do not require the legacy bindings should select
CONFIG_PPC_CPM_NEW_BINDING to enable the of_platform CPM devices. Once
all existing boards are converted and tested, the config option can
become default y to prevent new boards from using the old model.  Once
arch/ppc is gone, the config option can be removed altogether.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-03 20:35:43 -05:00
Scott Wood
6d817aa71f [POWERPC] CPM: Change from fsl,brg-frequency to brg/clock-frequency
As suggested by David Gibson, now that we have a separate node
for the baud rate generators, it's better to use the standard
clock-frequency property than a cpm-node-level fsl,brg-frequency
property.

This patch updates existing places where fsl,brg-frequency is
used.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-03 20:35:43 -05:00
Grant Likely
4dc9783ea9 [POWERPC] Virtex: add xilinx interrupt controller driver
Adds support for the Xilinx opb-intc interrupt controller

Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-10-03 07:23:14 -05:00
Paul Mackerras
70f227d884 Merge branch 'linux-2.6' into for-2.6.24 2007-10-03 15:33:17 +10:00
Michael Ellerman
0411a5e233 [POWERPC] Update mpic to use dcr_host_t.base
Now that dcr_host_t contains the base address, we can use that in the mpic
code, rather than storing it separately.

Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-10-03 13:25:27 +10:00
Michael Ellerman
0b94a1eeee [POWERPC] Store the base address in dcr_host_t
In its current form, dcr_map() doesn't remember the base address you passed
it, which means you need to store it somewhere else.  Rather than adding the
base to another struct it seems simpler to store it in the dcr_host_t.

Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-10-03 13:25:27 +10:00
Tony Breeds
aa3be5f32d [POWERPC] Implement {read,update}_persistent_clock
With these functions implemented we cooperate better with the generic
timekeeping code.  This obsoletes the need for the timer sysdev as a bonus.

Signed-off-by: Tony Breeds <tony@bakeyournoodle.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-10-03 11:48:42 +10:00
Michael Ellerman
21ccdd31e9 [POWERPC] Inline u3msi_compose_msi_msg()
In the MPIC U3 MSI code, we call u3msi_compose_msi_msg() once for each MSI.
This is overkill, as the address is per pci device, not per MSI. So setup
the address once, and just set the data per MSI.

Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-10-03 09:11:42 +10:00
Michael Ellerman
d9303d662f [POWERPC] Simplify error logic in u3msi_setup_msi_irqs()
u3msi_setup_msi_irqs() doesn't need to call teardown() itself,
the generic code will do this for us as long as we return a non
zero value.

Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-10-03 09:11:32 +10:00
Jochen Friedrich
83af919e0f [POWERPC] Fix copy'n'paste typo in commproc.c
The powerpc version of commproc.c exports cpm_dpram_addr twice
and cpm_dpram_phys not at all due to a typo. This patch fixes this
problem.

CC      arch/powerpc/sysdev/commproc.o
arch/powerpc/sysdev/commproc.c:398: error: redefinition of '__kcrctab_cpm_dpram_addr'
arch/powerpc/sysdev/commproc.c:392: error: previous definition of '__kcrctab_cpm_dpram_addr' was here
arch/powerpc/sysdev/commproc.c:398: error: redefinition of '__kstrtab_cpm_dpram_addr'
arch/powerpc/sysdev/commproc.c:392: error: previous definition of '__kstrtab_cpm_dpram_addr' was here
arch/powerpc/sysdev/commproc.c:398: error: redefinition of '__ksymtab_cpm_dpram_addr'
arch/powerpc/sysdev/commproc.c:392: error: previous definition of '__ksymtab_cpm_dpram_addr' was here
make[1]: *** [arch/powerpc/sysdev/commproc.o] Error 1
make: *** [arch/powerpc/sysdev] Error 2

Signed-off-by: Jochen Friedrich <jochen@scram.de>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-09-28 10:25:16 -05:00
Olof Johansson
17b5ee04c0 [POWERPC] Support setting affinity for U3/U4 MSI sources
Hook up affinity-setting for U3/U4 MSI interrupt sources.

Tested on Quad G5 with myri10ge.

Signed-off-by: Olof Johansson <olof@lixom.net>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Acked-by: Michael Ellerman <michael@ellerman.id.au>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-09-22 14:49:22 +10:00
Dale Farnsworth
9b41fcb0eb [POWERPC] Add Marvell mv64x60 udbg putc/getc functions
Commit 69331af, "Fixes and cleanups for earlyprintk aka boot console",
resulted in printk output prior to the initialization of the mpsc
console driver not being printed.  That commit causes the mpsc's
CON_PRINTBUFFER flag to be cleared since udbg should have printed
the previous output.

I guess we can no longer ignore udbg. :)

This patch provides udbg_putc() and udbg_getc() functions for the
Marvell mv64x60 chips. These functions are enabled if an mv64x60
port is to be used as the console as determined from the device tree.

Signed-off-by: Dale Farnsworth <dale@farnsworth.org>
Acked-by: Mark A. Greer <mgreer@mvista.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-09-22 14:49:21 +10:00
Stephen Rothwell
7b2c3c5b1d [POWERPC] Fix section mismatch in PCI code
Create a helper function (alloc_maybe_bootmem) that is marked __init_refok
to limit the chances of mistakenly referring to other __init routines.

WARNING: vmlinux.o(.text+0x2a9c4): Section mismatch: reference to .init.text:.__alloc_bootmem (between '.update_dn_pci_info' and '.pci_dn_reconfig_notifier')
WARNING: vmlinux.o(.text+0x36430): Section mismatch: reference to .init.text:.__alloc_bootmem (between '.mpic_msi_init_allocator' and '.find_ht_magic_addr')
WARNING: vmlinux.o(.text+0x5e804): Section mismatch: reference to .init.text:.__alloc_bootmem (between '.celleb_setup_phb' and '.celleb_fake_pci_write_config')
WARNING: vmlinux.o(.text+0x5e8e8): Section mismatch: reference to .init.text:.__alloc_bootmem (between '.celleb_setup_phb' and '.celleb_fake_pci_write_config')
WARNING: vmlinux.o(.text+0x5e968): Section mismatch: reference to .init.text:.__alloc_bootmem (between '.celleb_setup_phb' and '.celleb_fake_pci_write_config')

Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-09-19 15:25:34 +10:00
Anton Vorontsov
26f6cb9993 [POWERPC] fsl_soc: add support for fsl_spi
Add helper function to setup SPI bus/device information

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-09-14 08:54:09 -05:00
Kumar Gala
5d54ddcbcf [POWERPC] 85xx: Add basic Uniprocessor MPC8572 DS port
Added basic board port for MPC8572 DS reference platform that is
similiar to the MPC8544/33 DS reference platform in uniprocessor mode.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-09-14 08:51:54 -05:00
Scott Wood
f923473611 [POWERPC] fsl_soc.c cleanup
1. Update the way get_brgfreq() finds things in the device tree.

It now uses names that are less namespace polluting.  The old names
are supported until all boards are converted.

2. "size" is changed from unsigned int to int, to match what
of_get_property() expects.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-09-14 08:51:43 -05:00
Olof Johansson
0d72ba930c [POWERPC] Add workaround for MPICs with broken register reads
Some versions of PWRficient 1682M have an interrupt controller in which
the first register in each pair for interrupt sources doesn't always
read with the right polarity/sense values.

To work around this, keep a software copy of the register instead.  Since
it's not modified from the mpic itself, it's a feasible solution.  Still,
keep it under a config option to avoid wasting memory on other platforms.

Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-09-14 01:33:25 +10:00
Michael Ellerman
6815800601 [POWERPC] Provide a default irq_host match, which matches on an exact of_node
The most common match semantic is an exact match based on the device node.
So provide a default implementation that does this, and hook it up if no
match routine is specified.

Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-09-14 01:33:20 +10:00
Michael Ellerman
52964f87c6 [POWERPC] Add an optional device_node pointer to the irq_host
The majority of irq_host implementations (3 out of 4) are associated
with a device_node, and need to stash it somewhere. Rather than having
it somewhere different for each host, add an optional device_node pointer
to the irq_host structure.

Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-09-14 01:33:20 +10:00