Commit Graph

30 Commits

Author SHA1 Message Date
Ben Dooks
1288b670e6 [ARM] S3C64XX: add AHB_CON and SPCON register address definitions
Add the address definitions for S3C64XX_AHB_CONx and
SPCON registers for use in the PM code.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2009-03-10 16:33:42 +00:00
Ben Dooks
36d543a3b5 [ARM] S3C64XX: Add definitions for the GPIO memory port configurations
Add defines for the registers that control the GPIO pins that are
run the memory interface.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2009-03-10 16:33:26 +00:00
Ben Dooks
2ae0b117a6 [ARM] S3C64XX: SYSCON power and sleep control register defines
Add the register defines for the sleep and power control
functions in the S3C64XX SYSCON register block.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2009-03-10 16:33:08 +00:00
Ben Dooks
2454e524bc [ARM] S3C64XX: Add S3C64XX_SPCON register bit definitions
Add the definitions for the SPCON register in the
GPIO block.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2009-03-10 16:30:44 +00:00
Ben Dooks
e383707131 [ARM] S3C64XX: Add GPIO SPCONSLP and SLPEN register definitions
Add GPIO register definitions for SPCONSLP and SLPEN
for controlling the state of the pins over sleep.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2009-03-10 16:30:27 +00:00
Ben Dooks
333053733f [ARM] S3C64XX: Add EINT group regs and move IRQ_EINT to regs-gpio.h
Add definitions for the EINT group registers and move the EINT IRQ
register definitions out of arch/arm/plat-s3c64xx/irq-eint.c so that
they are available for re-use with PM and the other code.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2009-03-10 16:29:11 +00:00
Ben Dooks
5b3d515fcf [ARM] S3C64XX: Add modem registers and a virtual map
Add the modem registers and a virtual mapping for the
modem block. This is is required as there are registers
that control the LCD block that need to be saved over
suspend as well as interrupt controls.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2009-03-10 16:26:52 +00:00
Ben Dooks
4271c3bd46 [ARM] S3C64XX: Rename IRQ_UHOST to IRQ_USBH
The USB OHCI host device expects the IRQ definition to be named
IRQ_USBH, so rename the S3C64XX IRQ header to match.

Signed-off-by: Ben Dooks <ben@simtec.co.uk>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2009-02-26 23:25:51 +00:00
Matt Hsu
43a55cdffc [ARM] S3C64XX: Fix EINT group macro definition
Fix IRQ_EINT_GROUP which has an extra _ in it and
an error in the IRQ offset.

Signed-off-by: Matt Hsu <matt_hsu@openmoko.org>
[ben-linux@fluff.org: rewrite description]
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2009-01-08 16:25:24 +00:00
Ben Dooks
56c035c9ce Merge branch 'next-s3c64xx-device' into next-merged
Conflicts:

	arch/arm/mach-s3c2440/mach-at2440evb.c
2008-12-18 16:17:37 +00:00
Kyungmin Park
11e3bd0923 [ARM] S3C64XX: Mask the pll values correctly
Correct the PLL field masks to ensure the PLL functions return the
right value.

Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
[ben-linux@fluff.org: improve the description text]
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2008-12-16 10:19:13 +00:00
Ben Dooks
1aba834da1 [ARM] S3C: Add i2c1 device definition
Add device definition and support functions for the
second i2c device (i2c1). If this is selected, the first
i2c bus will become index 0 instead of index -1.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2008-12-15 23:56:41 +00:00
Ben Dooks
44539a7112 [ARM] S3C64XX: Fix MMC0 clock source register mask
Fix the definition of the MMC0 register shift and mask in the
CLKSRC register.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2008-12-15 23:50:22 +00:00
Ben Dooks
26da1bfc56 [ARM] S3C64XX: GPIO definitions for BANKS N,O,P,Q
GPIO register and configuration definitions for GPIO
banks N, O, P and Q.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2008-12-15 23:41:50 +00:00
Ben Dooks
4162d7e363 [ARM] S3C64XX: GPIO definitions for BANKS G,H,I,J
GPIO register and configuration definitions for GPIO
banks G, H, I and J.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2008-12-15 23:41:17 +00:00
Ben Dooks
b9f2d172f2 [ARM] S3C64XX: GPIO definitions for BANKS D,E,F
GPIO register and configuration definitions for GPIO
banks D, E and F.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2008-12-15 23:41:10 +00:00
Ben Dooks
995deb638d [ARM] S3C64XX: GPIO definitions for BANKS A,B,C
GPIO register and configuration definitions for GPIO
banks A, B and C.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2008-12-15 23:40:56 +00:00
Ben Dooks
3627379fc6 [ARM] S3C6XX: Add enable for clk_48
Add apropriate enable call for clk_48m.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2008-12-15 23:36:29 +00:00
Ben Dooks
89d043c3db [ARM] S3C64XX: GPIO library support
Add gpiolib registration for the GPIOs available on the
S3C64XX platform

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2008-12-15 23:33:59 +00:00
Ben Dooks
8cdf47cb4b [ARM] S3C64XX: Add external interrupt group definitions
Add definitions for the external interrupt groups which accompany
the original IRQ_EINT from the s3c24xx series.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2008-12-15 23:19:49 +00:00
Ben Dooks
80789e7915 [ARM] S3C64XX: Add IRQ_EINT support
Add the necessary code to support IRQ_EINT(x) on
the S3C64XX series of CPUs.

Note, since there is no GPIO configuration support
in the kernel, the irq set_type method does not
configure the relevant pin to interrupt.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2008-12-15 23:15:46 +00:00
Ben Dooks
cf18acf0e0 [ARM] S3C64XX: Clock support for S3C6400/S3C6410
Add the PLL clock initialisation and clock registration
and include the clocks sourced via CLKDIVx for most of
the on-chip peripherals.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2008-12-15 21:54:36 +00:00
Ben Dooks
952b564b4d [ARM] S3C64XX: Add PLL definitions
Add definitions for the s3c6400 epll and main pll
as well as functions to decode the rate. Add

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2008-12-15 21:53:38 +00:00
Ben Dooks
f982dc5321 [ARM] S3C64XX: Map timer memory and interrupts
Add the physical to virtual memory mapping and the
necessary interrupt demuxing for the PWM timer blocks.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2008-12-15 21:52:51 +00:00
Ben Dooks
d9b79fb568 [ARM] S3C64XX: Add VIC0 and VIC1 sourced interripts
Add and initialise the two VIC (PL192) found on
the S3C64XX series CPUs.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2008-12-15 21:51:22 +00:00
Ben Dooks
beda30f6a9 [ARM] S3C64XX: Basic CPU detection and map initialisation
Initialise the basic physical to virtual mappings and
then detect the CPU that the system is being run on so
that the cpu code code can call the correct initialisation
code.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2008-12-15 21:50:31 +00:00
Ben Dooks
c142f173cd [ARM] S3C64XX: Add IRQ definitions for VIC0 and VIC1
Add IRQ definitions for the VIC0 and VIC1 interrupts
on the S3C6400 and S3C6410 SoCs.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2008-12-15 21:50:06 +00:00
Ben Dooks
0241cbb9d6 [ARM] S3C64XX: Add UARTdevice definitions
Add resources and information for the UART deviecs
on the S3C64XX CPUs.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2008-12-15 21:49:46 +00:00
Ben Dooks
0660fed465 [ARM] S3C64XX: Add <plat/regs-clock.h>
Initial clock register defines.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2008-12-15 21:49:11 +00:00
Ben Dooks
d521f87e9c [ARM] S3C64XX: Initial arch header files
Add the initial header files for the S3C64XX support to satisfy the
minimal requirements to build a kernel. Some definitions will therefore
be placeholders or empty functions that will ensure that the system can
build and have base functionality. These will be filled in at a later
date.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2008-12-15 21:47:27 +00:00