Commit Graph

118 Commits

Author SHA1 Message Date
Shane Huang
e39fc8c9fd [libata] ahci: AMD SB700/SB800 SATA support 64bit DMA
SB700 SATA controller can support 64 bit DMA, the previous commit
badc234157 was added with
careless reference to SB600, which should be modified by this patch.

Signed-off-by: Shane Huang <shane.huang@amd.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-02-24 00:28:44 -05:00
Rafael J. Wysocki
3a2d5b7001 PM: Introduce PM_EVENT_HIBERNATE callback state
During the last step of hibernation in the "platform" mode (with the
help of ACPI) we use the suspend code, including the devices'
->suspend() methods, to prepare the system for entering the ACPI S4
system sleep state.

But at least for some devices the operations performed by the
->suspend() callback in that case must be different from its operations
during regular suspend.

For this reason, introduce the new PM event type PM_EVENT_HIBERNATE and
pass it to the device drivers' ->suspend() methods during the last phase
of hibernation, so that they can distinguish this case and handle it as
appropriate.  Modify the drivers that handle PM_EVENT_SUSPEND in a
special way and need to handle PM_EVENT_HIBERNATE in the same way.

These changes are necessary to fix a hibernation regression related
to the i915 driver (ref. http://lkml.org/lkml/2008/2/22/488).

Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
Acked-by: Pavel Machek <pavel@ucw.cz>
Tested-by: Jeff Chua <jeff.chua.linux@gmail.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2008-02-23 10:40:04 -08:00
James Bottomley
dde2020754 libata: eliminate the home grown dma padding in favour of
that provided by the block layer

ATA requires that all DMA transfers begin and end on word boundaries.
Because of this, a large amount of machinery grew up in ide to adjust
scatterlists on this basis.  However, as of 2.5, the block layer has a
dma_alignment variable which ensures both the beginning and length of a
DMA transfer are aligned on the dma_alignment boundary.  Although the
block layer does adjust the beginning of the transfer to ensure this
happens, it doesn't actually adjust the length, it merely makes sure
that space is allocated for transfers beyond the declared length.  The
upshot of this is that scatterlists may be padded to any size between
the actual length and the length adjusted to the dma_alignment safely
knowing that memory is allocated in this region.

Right at the moment, SCSI takes the default dma_aligment which is on a
512 byte boundary.  Note that this aligment only applies to transfers
coming in from user space.  However, since all kernel allocations are
automatically aligned on a minimum of 32 byte boundaries, it is safe to
adjust them in this manner as well.

tj: * Adjusting sg after padding is done in block layer.  Make libata
      set queue alignment correctly for ATAPI devices and drop broken
      sg mangling from ata_sg_setup().
    * Use request->raw_data_len for ATAPI transfer chunk size.
    * Killed qc->raw_nbytes.
    * Separated out killing qc->n_iter.

Signed-off-by: James Bottomley <James.Bottomley@HansenPartnership.com>
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jens Axboe <jens.axboe@oracle.com>
2008-02-19 11:36:56 +01:00
Tejun Heo
837f5f8fb9 ahci: fix CAP.NP and PI handling
AHCI uses CAP.NP to indicate the number of ports and PI to tell which
ports are enabled.  The only requirement is that the number of ports
indicated by CAP.NP should equal or be higher than the number of
enabled ports in PI.

CAP.NP and PI carry duplicate information and there have been some
interesting cases.  Some early AHCI controllers didn't set PI at all
and just implement from port 0 to CAP.NP.  An ICH8 board which wired
four out of six available ports had 3 (4 ports) for CAP.NP and 0x33
for PI.  While ESB2 has less bits set in PI than the value in CAP.NP.

Till now, ahci driver assumed that PI is invalid if it doesn't match
CAP.NP exactly.  This violates AHCI standard and the driver ends up
accessing unmimplemented ports on ESB2.

This patch updates CAP.NP and PI handling such that PI can have less
number of bits set than indicated in CAP.NP and the highest port is
determined as the maximum port of what CAP.NP and PI indicate.

Signed-off-by: Tejun Heo <htejun@gmail.com>
Cc: Jan Beulich <jbeulich@novell.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-02-06 06:59:27 -05:00
Jason Gaston
16ad1ad9cb ahci: RAID mode SATA patch for Intel ICH10 DeviceID's
This patch adds the Intel ICH10 SATA RAID Controllers DeviceID's.

Signed-off-by:  Jason Gaston <jason.d.gaston@intel.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-02-01 11:29:48 -05:00
Tejun Heo
b710a1f4b3 ahci: factor out AHCI enabling and enable AHCI before reading CAP
Factor out AHCI enabling into ahci_enable_ahci() and enabling AHCI
before reading CAP in ahci_save_initial_config() as the spec requires
enabling AHCI mode before accessing any other registers.

Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-01-23 05:24:16 -05:00
Al Viro
4ca4e43964 libata annotations and fixes
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-01-23 05:24:15 -05:00
Tejun Heo
ff2aeb1eb6 libata: convert to chained sg
libata used private sg iterator to handle padding sg.  Now that sg can
be chained, padding can be handled using standard sg ops.  Convert to
chained sg.

* s/qc->__sg/qc->sg/

* s/qc->pad_sgent/qc->extra_sg[]/.  Because chaining consumes one sg
  entry.  There need to be two extra sg entries.  The renaming is also
  for future addition of other extra sg entries.

* Padding setup is moved into ata_sg_setup_extra() which is organized
  in a way that future addition of other extra sg entries is easy.

* qc->orig_n_elem is unused and removed.

* qc->n_elem now contains the number of sg entries that LLDs should
  map.  qc->mapped_n_elem is added to carry the original number of
  mapped sgs for unmapping.

* The last sg of the original sg list is used to chain to extra sg
  list.  The original last sg is pointed to by qc->last_sg and the
  content is stored in qc->saved_last_sg.  It's restored during
  ata_sg_clean().

* All sg walking code has been updated.  Unnecessary assertions and
  checks for conditions the core layer already guarantees are removed.

Signed-off-by: Tejun Heo <htejun@gmail.com>
Cc: Jens Axboe <jens.axboe@oracle.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-01-23 05:24:14 -05:00
Tejun Heo
405e66b387 libata: implement protocol tests
Implement protocol tests - ata_is_atapi(), ata_is_nodata(),
ata_is_pio(), ata_is_dma(), ata_is_ncq() and ata_is_data() and use
them to replace is_atapi_taskfile() and hard coded protocol tests.

Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-01-23 05:24:10 -05:00
Tejun Heo
49f2909039 ahci: update PCS programming
For intel ones, ahci unconditionally OR'd 0xf to PCS.  This isn't
correct for the following cases.

* ich6/7m's which only implement P0 and P2 (0xf works fine tho)

* ich8/9's which have six ports and needs 0x3f to enable all ports

This patch updates PCS programming such that...

* port_map determined by ahci_save_initial_config() is OR'd instead of 0xf

* PCS is updated only if necessary (there are turned off enable bits)

port_map is determined from PORTS_IMPL PCI register which is
implemented as write or write-once register.  If the register isn't
programmed, ahci automatically generates it from number of ports,
which is good enough for PCS programming.  ICH6/7M are probably the
only ones where non-contiguous enable bits are necessary && PORTS_IMPL
isn't programmed properly but they're proven to work reliably with 0xf
anyway.

Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-01-23 05:24:10 -05:00
Tejun Heo
459ad68893 libata: kill spurious NCQ completion detection
Spurious NCQ completion detection implemented in ahci was incorrect.
On AHCI receving and processing FISes and raising interrupts are not
interlocked and spurious interrupts are expected.

For example, if an interrupt occurs while interrupt handler is running
and the running interrupt handler handles the event the new IRQ
indicated, after IRQ handler finishes, it will be executed again
because IRQ pending bit is set by the new interrupt but there won't be
anything to process.

Please read the following message for more information.

  http://article.gmane.org/gmane.linux.ide/26012

This patch...

* Removes all spurious IRQ whining from ahci.  Spurious NCQ completion
  detection was completely wrong.  Spurious D2H Register FIS taught us
  that some early drives send spurious D2H Register FIS with I bit set
  while NCQ commands are in progress but none of recent drives does
  that and even the ones which show such behavior can do NCQ fine.

* Kills all NCQ blacklist entries which were added because of spurious
  NCQ completions.  I tracked down each commit and verified all
  removed ones are actually added because of spurious completions.

  WD740ADFD-00NLR1 wasn't deleted but moved upward because the drive
  not only had spurious NCQ completions but also is slow on sequential
  data transfers if NCQ is enabled.

  Maxtor 7V300F0 was added by 0e3dbc01d5
  from Alan Cox.  I can only find evidences that the drive only had
  troubles with spuruious completions by searching the mailing list.
  This entry needs to be verified and removed if it doesn't have other
  NCQ related problems.

Signed-off-by: Tejun Heo <htejun@gmail.com>
Cc: Alan Cox <alan@lxorguk.ukuu.org.uk>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-12-07 15:27:54 -05:00
Tejun Heo
c4f7792c02 ahci: don't attach if ICH6 is in combined mode
ICH6 R/Ms share PCI ID between piix and ahci modes and we've been
allowing ahci to attach regardless of how BIOS configured it.
However, enabling AHCI mode when the controller is in combined mode
can result in unexpected behavior.  Don't attach if the controller is
in combined mode.

Signed-off-by: Tejun Heo <htejun@gmail.com>
Cc: Bill Nottingham <notting@redhat.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-12-07 15:27:54 -05:00
Tejun Heo
994056d7aa ahci: fix engine reset failed message
There isn't much point in reporting -EOPNOTSUPP as failure.  Also the
message was missing newline.

Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-12-07 15:27:53 -05:00
peerchen
6ba8695870 ahci: add the Device IDs of MCP79 AHCI controller to ahci.c
Add the device IDs of legacy mode of MCP79 AHCI controller to ahci.c

Signed-off-by: Peer Chen <peerchen@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-12-04 14:10:14 -05:00
Kristen Carlson Accardi
31556594f9 [libata] AHCI: add hw link power management support
This patch will set the correct bits to turn on Aggressive
Link Power Management (ALPM) for the ahci driver.  This
will cause the controller and disk to negotiate a lower
power state for the link when there is no activity (see
the AHCI 1.x spec for details).  This feature is mutually
exclusive with Hot Plug, so when ALPM is enabled, Hot Plug
is disabled.  ALPM will be enabled by default, but it is
settable via the scsi host syfs interface.  Possible
settings for this feature are:

Setting         Effect
----------------------------------------------------------
min_power       ALPM is enabled, and link set to enter
                lowest power state (SLUMBER) when idle
                Hot plug not allowed.

max_performance ALPM is disabled, Hot Plug is allowed

medium_power    ALPM is enabled, and link set to enter
                second lowest power state (PARTIAL) when
                idle.  Hot plug not allowed.

Signed-off-by:  Kristen Carlson Accardi <kristen.c.accardi@intel.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2007-10-29 11:00:35 -04:00
Jeff Garzik
ab6fc95f60 [libata] AHCI: fix newly introduced host-reset bug
The recent fix to host reset introduced a problem, whereby AHCI-enable
bit would be cleared upon reset, if it was not asserted prior to reset.

Unconditionally enable AHCI-enable bit.

Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2007-10-29 10:43:55 -04:00
Tejun Heo
88ff6eafbb libata: implement ata_wait_after_reset()
On certain device/controller combination, 0xff status is asserted
after reset and doesn't get cleared during 150ms post-reset wait.  As
0xff status is interpreted as no device (for good reasons), this can
lead to misdetection on such cases.

This patch implements ata_wait_after_reset() which replaces the 150ms
sleep and waits upto ATA_TMOUT_FF_WAIT if status is 0xff.
ATA_TMOUT_FF_WAIT is currently 800ms which is enough for
HHD424020F7SV00 to get detected but not enough for Quantum GoVault
drive which is known to take upto 2s.

Without parallel probing, spending 2s on 0xff port would incur too
much delay on ata_piix's which use 0xff to indicate empty port and
doesn't have SCR register, so GoVault needs to wait till parallel
probing.

Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-10-29 06:15:27 -04:00
Tejun Heo
edc9305284 ahci: ahci: implement workaround for ASUS P5W-DH Deluxe ahci_broken_hardreset(), take #2
P5W-DH Deluxe has ICH9 which doesn't have PMP support but SIMG 4726
hardwired to the second port of AHCI controller at PCI device 1f.2.
The 4726 doesn't work as PMP but as a storage processor which can do
hardware RAID on downstream ports.

When no device is attached to the downstream port of the 4726, pseudo
ATA device for configuration appears.  Unfortunately, ATA emulation on
the device is very lousy and causes long hang during boot.

This patch implements workaround for the board.  If the mainboard is
P5W-DH Deluxe (matched using DMI), only hardreset is used on the
second port of AHCI controller @ 1f.2 and the hardreset doesn't depend
on receiving the first FIS and just proceed to IDENTIFY.

This workaround fixes bugzilla #8923.

  http://bugzilla.kernel.org/show_bug.cgi?id=8923

Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-10-25 02:06:59 -04:00
Jeff Garzik
2dcb407e61 [libata] checkpatch-inspired cleanups
Tackle the relatively sane complaints of checkpatch --file.

The vast majority is indentation and whitespace changes, the rest are

* #include fixes
* printk KERN_xxx prefix addition
* BSS/initializer cleanups

Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2007-10-23 20:59:42 -04:00
Robert P. J. Day
3a4fa0a25d Fix misspellings of "system", "controller", "interrupt" and "necessary".
Fix the various misspellings of "system", controller", "interrupt" and
"[un]necessary".

Signed-off-by: Robert P. J. Day <rpjday@mindspring.com>
Signed-off-by: Adrian Bunk <bunk@kernel.org>
2007-10-19 23:10:43 +02:00
Tejun Heo
b06ce3e51e libata: use ata_exec_internal() for PMP register access
PMP registers used to be accessed with dedicated accessors ->pmp_read
and ->pmp_write.  During reset, those callbacks are called with the
port frozen so they should be able to run without depending on
interrupt delivery.  To achieve this, they were implemented polling.

However, as resetting the host port makes the PMP to isolate fan-out
ports until SError.X is cleared, resetting fan-out ports while port is
frozen doesn't buy much additional safety.

This patch updates libata PMP support such that PMP registers are
accessed using regular ata_exec_internal() mechanism and kills
->pmp_read/write() callbacks.  The following changes are made.

* PMP access helpers - sata_pmp_read_init_tf(), sata_pmp_read_val(),
  sata_pmp_write_init_tf() are folded into sata_pmp_read/write() which
  are now standalone PMP register access functions.

* sata_pmp_read/write() returns err_mask instead of rc.  This is
  consistent with other functions which issue internal commands and
  allows more detailed error reporting.

* ahci interrupt handler is modified to ignore BAD_PMP and
  spurious/illegal completion IRQs while reset is in progress.  These
  conditions are expected during reset.

Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-10-12 14:55:47 -04:00
Tejun Heo
5f226c6bf7 ahci: fix notification handling
Asynchronous notification on ICH9 didn't work because it didn't write
AN FIS into the RX area - it only updates SNotification.  Also,
snooping SDB_FIS RX area is racy against further SDB FIS receptions.
Let sata_async_notification() determine using SNTF if it's available
and snoop RX area iff SNTF isn't available

Signed-off-by: Tejun Heo <htejun@gmail.com>
Cc: Kristen Carlson Accardi <kristen.c.accardi@intel.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-10-12 14:55:47 -04:00
Tejun Heo
1c954a4d9a ahci: clean up PORT_IRQ_BAD_PMP enabling
Now that we have pp->intr_mask, move PORT_IRQ_BAD_PMP enabling to
ahci_pmp_attach/detach() where it belongs.

Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-10-12 14:55:47 -04:00
Tejun Heo
75da6d2b8f ahci: kill leftover from enabling NCQ over PMP
ahci had problems with NCQ over PMP and NCQ used to be disabled while
PMP was attached.  After fixing the problem, the temporary NCQ
disabling code wasn't removed completely.  Kill the remaining piece.

Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-10-12 14:55:46 -04:00
Peer Chen
7100819f5f ahci: Add MCP79 support to AHCI driver
Signed-off-by: Peer Chen <peerchen@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-10-12 14:55:45 -04:00
Tejun Heo
6949b9148d ahci: implement AHCI_HFLAG_NO_PMP
Of course some controllers lie about PMP support.  Black list them.

Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-10-12 14:55:44 -04:00
Tejun Heo
417a1a6d3d ahci: move host flags over to pi.private_data
Private pi.flags area is full and we need more private flags.  Move
host private flags over to pi.private_data.  During initialization,
these flags are copied to hpriv->flags.

Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-10-12 14:55:44 -04:00
Tejun Heo
7d50b60b5e ahci: implement PMP support
Implement AHCI PMP support.  ahci only supports command based
switching.  Also, for some reason, NCQ over PMP doesn't work now.
Other than that, everything works.

Tested on ICH9R, JMB360/363 + SIMG3726, 4726 and 5744.

Signed-off-by: Tejun Heo <htejun@gmail.com>
Cc: Forrest Zhao <forrest.zhao@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-10-12 14:55:44 -04:00
Jeff Garzik
3cc3eb1148 [libata] AHCI: enable AHCI mode, before using AHCI reset
AHCI spec says host-reset bit may only be set when the ahci-enable bit
is also set.

Noticed by Peer Chen <peerchen@gmail.com>

Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-10-12 14:55:42 -04:00
Tejun Heo
7d77b24708 libata-pmp-prep: implement sata_async_notification()
AN serves multiple purposes.  For ATAPI, it's used for media change
notification.  For PMP, for downstream PHY status change notification.
Implement sata_async_notification() which demultiplexes AN.

To avoid unnecessary port events, ATAPI AN is not enabled if PMP is
attached but SNTF is not available.

Signed-off-by: Tejun Heo <htejun@gmail.com>
Cc: Kriten Carlson Accardi <kristen.c.accardi@intel.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-10-12 14:55:42 -04:00
Tejun Heo
31cc23b349 libata-pmp-prep: implement ops->qc_defer()
Controllers which support PMP have various restrictions on which
combinations of commands are allowed to what number of devices
concurrently.  This patch implements ops->qc_defer() which determines
whether a qc can be issued at the moment or should be deferred.

If the function returns ATA_DEFER_LINK, the qc will be deferred until
a qc completes on the link.  If ATA_DEFER_PORT, until a qc completes
on any link.  The defer conditions are advisory and in general
ATA_DEFER_LINK can be considered as lower priority deferring than
ATA_DEFER_PORT.

ops->qc_defer() replaces fixed ata_scmd_need_defer().  For standard
NCQ/non-NCQ exclusion, ata_std_qc_defer() is implemented.  ahci and
sata_sil24 are converted to use ata_std_qc_defer().

ops->qc_defer() is heavier than the original mechanism because full qc
is prepped before determining to defer it, but various information is
needed to determine defer conditinos and fully translating a qc is the
only way to supply such information in generic manner.

IMHO, this shouldn't cause any noticeable performance issues as

* for most cases deferring occurs rarely (except for NCQ-aware
  cmd-switching PMP)
* translation itself isn't that expensive
* once deferred the command won't be repeated until another command
  completes which usually is a very long time cpu-wise.

Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-10-12 14:55:41 -04:00
Tejun Heo
854c73a2f1 libata: misc updates for AN
Update AN support in preparation of PMP support.

* s/ata_id_has_AN/ata_id_has_atapi_AN/
* add AN enabled reporting during configuration
* add err_mask to AN configuration failure reporting
* update LOCKING comment for ata_scsi_media_change_notify()
* check whether ATA dev is attached to SCSI dev ata_scsi_media_change_notify()
* set ATA_FLAG_AN in ahci and sata_sil24

Signed-off-by: Tejun Heo <htejun@gmail.com>
Cc: Kriten Carlson Accardi <kristen.c.accardi@intel.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-10-12 14:55:40 -04:00
Jason Gaston
d4155e6f13 ahci: RAID mode SATA patch for Intel Tolapai
Signed-off-by: Jason Gaston <jason.d.gaston@intel.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-10-12 14:55:39 -04:00
Tejun Heo
7a234aff3d ahci: reimplement port_map handling
Reimplement port_map handling such that

1. Non-zero PORTS_IMPL value is always examined and used if consistent
   with cap.n_ports.

2. When PI and cat.n_ports are inconsistent, honor cap.n_ports and
   force port_map to be ((1 << cap.n_ports) - 1).

3. There were two separate places dealing with port_map.  Unify them
   to one.

As all newer ahci chips seem to get PI correct and older ones usually
have zero PI.  Controllers with holes in PI are very unlikely to screw
up PI, so #2 makes more sense than following inconsistent PI.

Without this change, not setting ATA_FLAG_HONOR_PI when it's needed
results in weird detection failure.  This changed logic should be able
to handle all known cases correctly automatically.

Verified on ICH6 (reports 0 PI), ICH8 (with holes in port_map), ICH9,
JMB360 and JMB363.

Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-10-12 14:55:39 -04:00
Tejun Heo
cbcdd87593 libata: implement and use ata_port_desc() to report port configuration
Currently, port configuration reporting has the following problems.

* iomapped address is reported instead of raw address
* report contains irrelevant fields or lacks necessary fields for
  non-SFF controllers.
* host->irq/irq2 are there just for reporting and hacky.

This patch implements and uses ata_port_desc() and
ata_port_pbar_desc().  ata_port_desc() is almost identical to
ata_ehi_push_desc() except that it takes @ap instead of @ehi, has no
locking requirement, can only be used during host initialization and "
" is used as separator instead of ", ".  ata_port_pbar_desc() is a
helper to ease reporting of a PCI BAR or an offsetted address into it.

LLD pushes whatever description it wants using the above two
functions.  The accumulated description is printed on host
registration after "[S/P]ATA max MAX_XFERMODE ".

SFF init helpers and ata_host_activate() automatically add
descriptions for addresses and irq respectively, so only LLDs which
isn't standard SFF need to add custom descriptions.  In many cases,
such controllers need to report different things anyway.

Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-10-12 14:55:37 -04:00
Jeff Garzik
ac8869d56d [libata] Remove ->port_disable() hook
It was always set to ata_port_disable().  Removed the hook, and replaced
the very few ap->ops->port_disable() callsites with direct calls to
ata_port_disable().

Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-10-12 14:55:35 -04:00
Jeff Garzik
6d32d30f55 [libata] Remove ->irq_ack() hook, and ata_dummy_irq_on()
* ->irq_ack() is redundant to what the irq handler already
  performs... chk-status + irq-clear.  Furthermore, it is only
  called in one place, when screaming-irq-debugging is enabled,
  so we don't want to bother with a hook just for that.

* ata_dummy_irq_on() is only ever used in drivers that have
  no callpath reaching ->irq_on().  Remove .irq_on hook from
  those drivers, and the now-unused ata_dummy_irq_on()

Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-10-12 14:55:34 -04:00
Kristen Carlson Accardi
a738492501 ahci: Store interrupt value
Use a stored value for which interrupts to enable.  Changing this allows
us to selectively turn off certain interrupts later and have them
stay off.

Signed-off-by:  Kristen Carlson Accardi <kristen.c.accardi@intel.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-10-12 14:55:33 -04:00
Kristen Carlson Accardi
2f2949680a [libata] ahci: send event when AN received
When we get an SDB FIS with the 'N' bit set, we should send
an event to user space to indicate that there has been a
media change.  This will be done via the scsi device.

Signed-off-by: Kristen Carlson Accardi <kristen.c.accardi@intel.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-10-12 14:55:33 -04:00
Tejun Heo
0c88758b5a libata-link: make two port flags HRST_TO_RESUME and SKIP_D2H_BSY link flags
HRST_TO_RESUME and SKIP_D2H_BSY are link attributes.  Move them to
ata_link->flags.  This will allow host and PMP links to have different
attributes.  ata_port_info->link_flags is added and used by LLDs to
specify these flags during initialization.

Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-10-12 14:55:31 -04:00
Tejun Heo
cc0680a580 libata-link: linkify reset
Make reset methods and related functions deal with ata_link instead of
ata_port.

* ata_do_reset()
* ata_eh_reset()
* all prereset/reset/postreset methods and related functions

This patch introduces no behavior change.

Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-10-12 14:55:31 -04:00
Tejun Heo
936fd73286 libata-link: linkify PHY-related functions
Make the following PHY-related functions to deal with ata_link instead
of ata_port.

* sata_print_link_status()
* sata_down_spd_limit()
* ata_set_sata_spd_limit() and friends
* sata_link_debounce/resume()
* sata_scr_valid/read/write/write_flush()
* ata_link_on/offline()

This patch introduces no behavior change.

Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-10-12 14:55:30 -04:00
Tejun Heo
9af5c9c97d libata-link: introduce ata_link
Introduce ata_link.  It abstracts PHY and sits between ata_port and
ata_device.  This new level of abstraction is necessary to support
SATA Port Multiplier, which basically adds a bunch of links (PHYs) to
a ATA host port.  Fields related to command execution, spd_limit and
EH are per-link and thus moved to ata_link.

This patch only defines the host link.  Multiple link handling will be
added later.  Also, a lot of ap->link derefences are added but many of
them will be removed as each part is converted to deal directly with
ata_link instead of ata_port.

This patch introduces no behavior change.

Signed-off-by: Tejun Heo <htejun@gmail.com>
Cc: James Bottomley <James.Bottomley@SteelEye.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-10-12 14:55:30 -04:00
henry su
c69c0892d8 [libata] ahci: add ATI SB800 PCI IDs
ATI/AMD SB800 shares some device IDs with SB700,
and SB800 adds two more device IDs:0x4394,0x4395.

Signed-off-by: henry su <henry.su.ati@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-09-20 16:07:33 -04:00
su henry
badc234157 The SATA controller device ID is different according to
the onchip SATA type set in the system BIOS:
Device                              Device ID
SATA in IDE mode             0x4390
SATA in AHCI mode           0x4391
SATA in non-raid5 driver     0x4392
SATA in raid5 driver           0x4393

Although the device ID is different, they use the same AHCI driver
.The attached file is the patch for adding these device
IDs for ATI SB700.

Signed-off-by: henry.su.ati@gmail.com
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-07-20 08:07:46 -04:00
Tejun Heo
203ef6c456 ahci: implement SCR_NOTIFICATION r/w
Make ahci_scr_read/write() handle SCR_NOTIFICATION if the controller
supports it.  Also, print "sntf" in the cap line if supported.

While at it, convert eight space into a tab in ahci_print_info().

Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-07-20 08:02:11 -04:00
Tejun Heo
274c1fde5c ahci: make NO_NCQ handling more consistent
ahci_save_initial_config() is responsible for reading, screening the
host CAP register and storing the modified result into hpriv->cap for
the rest of the driver.  Move ATA_FLAG_NO_NCQ handling into
ahci_save_initial_config().  It's more consistent this way and the
rest of the driver can always refer to hpriv->cap to determine
configured capability.

Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-07-20 08:02:11 -04:00
Tejun Heo
da3dbb17a0 libata: make ->scr_read/write callbacks return error code
Convert ->scr_read/write callbacks to return error code to better
indicate failure.  This will help handling of SCR_NOTIFICATION.

Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-07-20 08:02:11 -04:00
Tejun Heo
b64bbc39f2 libata: improve EH report formatting
Requiring LLDs to format multiple error description messages properly
doesn't work too well.  Help LLDs a bit by making ata_ehi_push_desc()
insert ", " on each invocation.  __ata_ehi_push_desc() is the raw
version without the automatic separator.

While at it, make ehi_desc interface proper functions instead of
macros.

Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-07-20 08:02:11 -04:00
Tejun Heo
a9cf5e8581 ahci: separate out ahci_do_softreset()
Separate out ahci_do_softreset() which takes @pmp as its last
argument.  This will be used to implement ahci_pmp_softreset().

Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-07-20 08:02:10 -04:00