Commit Graph

1642 Commits

Author SHA1 Message Date
Juergen Beisert
ff6552e4f3 i.MX27 family: Add the Phytec PCM970 evaluation board
The Phytec phyCORE-i.MX27 CPU module is delivered with the PCM970
baseboard by default. This patch adds support for the hardware.

This code is only an empty stub; it is filled up with functionality
in a later patch series.

Signed-off-by: Juergen Beisert <j.beisert@pengutronix.de>
2008-07-05 10:03:01 +02:00
Juergen Beisert
7e5e9f5457 i.MX27: Adding PCM038 platform support
This patch adds support for the phyCORE-i.MX27 cpu module (aka pcm038).
It is as generic as possible in order to support any kind of baseboard.

Note: This CPU module implementation can't work without a baseboard
support. Baseboard support can be added by the PCM-970 (included in
this patch stack) or any custom variant.

Signed-off-by: Juergen Beisert <j.beisert@pengutronix.de>
2008-07-05 10:03:00 +02:00
Juergen Beisert
80eedae6f0 i.MX27: Add ADS platform support
This patch adds basic support for the Freescale MX27ADS reference board.
Currently only a serial console can be used.

Signed-off-by: Juergen Beisert <j.beisert@pengutronix.de>
2008-07-05 10:03:00 +02:00
Juergen Beisert
f31405cc4c i.MX27 CPU: Add basic i.MX27 CPU support
Add basic i.MX27 CPU support

Signed-off-by: Juergen Beisert <j.beisert@pengutronix.de>
2008-07-05 10:02:59 +02:00
Juergen Beisert
32dc80c9cb i.MX2 family: Add basic mach support (headers)
This patch adds basic mach support for the mx2 processor family, based
on the original freescale code and adapted to mainline kernel coding
style.

Signed-off-by: Juergen Beisert <j.beisert@pengutronix.de>
2008-07-05 10:02:56 +02:00
Juergen Beisert
aa10abd381 i.MX2 family: Add GPIO multiplexing support
This patch adds GPIO multiplexing support for the imx1/mxc2
family of procesors.

Signed-off-by: Juergen Beisert <j.beisert@pengutronix.de>
2008-07-05 10:02:55 +02:00
Juergen Beisert
259bcaae9a MXC arch: Simplify architecture's irq sources
Simplify architecture's irq headers and sources, to share these files
between MXC3 and MXC2.

Signed-off-by: Juergen Beisert <j.beisert@pengutronix.de>
2008-07-05 10:02:54 +02:00
Daniel Mack
9a4cd7a5c8 MX3: Add basic support for LogicPD i.MX31 LiteKit
This patch adds basic support for i.MX31 LiteKit by LogicPD.
With printascii() in kernel/printk.c, it boots right into the
rootfs-panic.

Note: This is a modified version of Daniel's patch to fit into this patch
stack.

> On 09.06.2008, at 17:26, Russell King - ARM Linux wrote:
>
> > I would much prefer it if board specific includes were included by the
> > code which needs them rather than in asm/arch/hardware.h.  With the
> > device model, drivers shouldn't need to include any board specific
> > includes - only the board specific C file should need it.
>
> The new version of this patch (#5102) has been uploaded to the patch
> tracker this morning.

Signed-off-by: Daniel Mack <daniel@caiaq.de>

-- 
 arch/arm/configs/mx31litekit_defconfig    | 1100 ++++++++++++++++++++++++++++++
 arch/arm/mach-mx3/Kconfig                 |    7 
 arch/arm/mach-mx3/Makefile                |    1 
 arch/arm/mach-mx3/mx31lite.c              |   96 ++
 include/asm-arm/arch-mxc/board-mx31lite.h |   38 +
 include/asm-arm/arch-mxc/debug-macro.S    |    3 
 6 files changed, 1245 insertions(+)
2008-07-05 10:02:53 +02:00
Sascha Hauer
ce8ffef0bf MX31: add basic pcm037 board support
This patch adds basic board support for phytecs pmc037 board.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2008-07-05 10:02:52 +02:00
Sascha Hauer
4bc256501a MXC: add debug-macro.S for mxc
This patch adds debug-macro.S for arch-mxc

Disadvantage: Due to the board specific UART definition, these macros (and
compile time) will fail for multi board kernels.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2008-07-05 10:02:51 +02:00
Juergen Beisert
d0f349fbce i.MXC family: Adding timer support
This patch adds timer support for the i.MX machine family. This code can
be used on the following machs:

 - i.MX1 (tested)
 - i.MX2 (i.MX21 (to be tested), i.MX27 (tested))
 - i.MX3 (i.MX31 (tested))

TODO: It seems impossible to build a kernel for more than one CPU because the
timer do not follow the platform device rules. So it does only work if
timer 1 can be accessed on all CPUs at the same address.

Signed-off-by: Juergen Beisert <j.beisert@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2008-07-05 10:02:50 +02:00
Sascha Hauer
90292ea60f MXC: add io multiplexing functions for mx3
This patch adds functions to use the io multiplexer on mx3 platforms.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2008-07-05 10:02:50 +02:00
Juergen Beisert
07bd1a6cc7 MXC arch: Add gpio support for the whole platform
This patch bases on the one from Daniel Mack. The most important change to
Daniel's patch is to be more generic. This gpio routine supports at least
the i.MX27 and i.MX31 processors.

Signed-off-by: Juergen Beisert <j.beisert@pengutronix.de>
Acked-by: Daniel Mack <daniel@caiaq.de>
2008-07-05 10:02:49 +02:00
Sascha Hauer
e3d13ff4b9 mxc: add MX3 support for i.MX internal UART driver
This patch adds MX3 support for the i.MX internal uart driver.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2008-07-05 10:02:48 +02:00
Sascha Hauer
df1bf4bdb2 i.MX3: introduce clock API
This patch introduces the clock API for for arch-mxc

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2008-07-05 10:02:48 +02:00
Juergen Beisert
c0db2ea4e3 MXC family: Add clock handling
Internal clock path handling for the mxc CPUs.

Changed against the original Freescale code (and against clocklib for example):
 - clock rate is always calculated whenever one ask for the current rate
   (means struct clk has no more a member called "rate"). So switching the PLL
   base frequency will propagate immediately to all other clocks that are
   depending on this frequency.

Signed-off-by: Juergen Beisert <j.beisert@pengutronix.de>
2008-07-05 10:02:47 +02:00
Sascha Hauer
38a41fdf94 IMX: introduce clock API
This patch introduces the clock API for i.MX and converts all
in-Kernel drivers to use it.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2008-07-05 10:02:46 +02:00
Sascha Hauer
2582d8c165 IMX UART: Add board specific init/exit functions
Add platform specific init functions. Also rename the struct
platform_device dev into pdev.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2008-07-05 10:02:45 +02:00
Sascha Hauer
63dd10846d MXC: do not include board specific header from architecture include
do not include board-mx31ads.h from hardware.h, instead include it
directly only where needed.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2008-07-05 10:02:43 +02:00
Ben Dooks
6fc601e37b [ARM] S3C24XX: PWM API support.
Add support for PWM in the S3C24XX series of SoC via the
PWM API.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2008-07-03 16:51:30 +01:00
Matthieu Castet
d5c52922b6 [ARM] S3C2412: Correct parents for EREFCLK and UREFCLK
For s3c2412, set parent for clk_erefclk and clk_urefclk.
This allow for example to use xtal or extclk for i2s clock.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Matthieu Castet <matthieu.castet@parrot.com>
2008-07-03 16:51:30 +01:00
Ben Dooks
b4b68f8cfa [ARM] S3C24XX: Add PWM timer MUX defines
Add timer defines for the MUX settings for
each of the PWM timers to add to the per-timer
defines already in the file.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2008-07-03 16:51:23 +01:00
Ben Dooks
f348a2a281 [ARM] S3C24XX: Add gpiolib support
Add support for gpilib on all S3C24XX platforms.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2008-07-03 16:51:23 +01:00
Paulius Zaleckas
f7def13ed0 [ARM] 5122/1: imx_dma_request_by_prio simpilfication
imx_dma_request_by_prio can return channel number by itself.
No need to supply variable address through parameters.

Also converted all drivers using this function.

Signed-off-by: Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-07-03 16:39:57 +01:00
Catalin Marinas
826cbdaff2 [ARM] 5092/1: Fix the I-cache invalidation on ARMv6 and later CPUs
This patch adds the I-cache invalidation in update_mmu_cache if the
corresponding vma is marked as executable. It also invalidates the
I-cache if a thread migrates to a CPU it never ran on.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-07-03 16:39:57 +01:00
Vegard Nossum
3c093f9f18 [ARM] fix header guards
Acked-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Vegard Nossum <vegard.nossum@gmail.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-07-03 16:39:56 +01:00
Russell King
946e2ad040 Merge branch 'fb' into devel
Conflicts:

	arch/arm/Kconfig
2008-07-03 16:13:28 +01:00
Russell King
9ecba1f288 [ARM] rpc: ecard: remove deprecated ecard_address() and relatives
ecard_address() is obsolete, and has been marked deprecated since
at least 2.6.12-rc2.  All in-tree users have been updated to use
the new approach, so it's time to remove this.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-07-03 14:25:58 +01:00
Russell King
50bbb05d60 [ARM] rpc: deprecate __ioaddr() and __ioaddrc() helpers
Now everything is converted to use MMIO accessors, these helpers
are no longer required.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-07-03 14:25:58 +01:00
eric miao
5cca91479b [ARM] pxa: make zylonite use the generic PWM backlight driver
Patch mostly by Eric Miao, minor edits by rmk.

Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-07-03 13:25:02 +01:00
Paul Walmsley
88b8ba9057 ARM: OMAP2: Clock: New OMAP2/3 DPLL rate rounding algorithm
This patch adds a new rate rounding algorithm for DPLL clocks on the
OMAP2/3 architecture.

For a desired DPLL target rate, there may be several
multiplier/divider (M, N) values which will generate a sufficiently
close rate.  Lower N values result in greater power economy.  However,
lower N values can cause the difference between the rounded rate and
the target rate ("rate error") to be larger than it would be with a
higher N.  This can cause downstream devices to run more slowly than
they otherwise would.

This DPLL rate rounding algorithm:

- attempts to find the lowest possible N (DPLL divider) to reach the
  target_rate (since, according to Richard Woodruff <r-woodruff@ti.com>,
  lower N values save more power than higher N values).

- allows developers to set an upper bound on the error between the
  rounded rate and the desired target rate ("rate tolerance"), so an
  appropriate balance between rate fidelity and power savings can be
  set.  This maximum rate error tolerance is set via
  omap2_set_dpll_rate_tolerance().

- never returns a rounded rate higher than the target rate.

The rate rounding algorithm caches the last rounded M, N, and rate
computation to avoid rounding the rate twice for each clk_set_rate()
call.  (This patch does not yet implement set_rate for DPLLs; that
follows in a future patch.)

The algorithm trades execution speed for rate accuracy.  It will find
the (M, N) set that results in the least rate error, within a
specified rate tolerance.  It does this by evaluating each divider
setting - on OMAP3, this involves 128 steps.  Another approach to DPLL
rate rounding would be to bail out as soon as a valid rate is found
within the rate tolerance, which would trade rate accuracy for
execution speed.  Alternate implementations welcome.

This code is not yet used by the OMAP24XX DPLL clock, since it
is currently defined as a composite clock, fusing the DPLL M,N and the
M2 output divider.  This patch also renames the existing OMAP24xx DPLL
programming functions to highlight that they program both the DPLL and
the DPLL's output multiplier.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2008-07-03 12:24:46 +03:00
Paul Walmsley
542313cc98 ARM: OMAP2: Clock: Add OMAP3 DPLL autoidle functions
This patch adds support for DPLL autoidle control to the OMAP3 clock
framework.  These functions will be used by the noncore DPLL enable
and disable code - this is because, according to the CDP code, the
DPLL autoidle status must be saved and restored across DPLL
lock/bypass/off transitions.

N.B.: the CORE DPLL (DPLL3) has three autoidle mode options, rather
than just two.  This code currently does not support the third option,
low-power bypass autoidle.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2008-07-03 12:24:45 +03:00
Paul Walmsley
097c584cd4 ARM: OMAP: Add OMAP chip type structure; clean up mach-omap2/id.c
Add a new OMAP chip identification interface, omap_chip_id.
omap_chip_id is a structure which contains one bit for each OMAP2/3
CPU type, and on 3430, ES level.  For example, the CHIP_IS_OMAP2420
bit is set in omap_chip at boot on an OMAP2420.  On OMAP3430ES2, both
CHIP_IS_OMAP3430 and CHIP_IS_OMAP3430ES2 bits are set.

omap_chip is set in mach-omap2/id.c by _set_omap_chip(). Other
code should use the omap_chip_is() function to test against omap_chip.

Also, clean up id.c by splitting some code out of
omap_check_revision() into its own function, _set_system_rev(); and
converting some debug printk()s into pr_debug().

Second revision.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2008-07-03 12:24:45 +03:00
Tony Lindgren
a58caad113 ARM: OMAP: Introduce omap_globals and prcm access functions for multi-omap
New struct omap_globals contains the omap processor specific
module bases. Use omap_globals to set the various base addresses
to make detecting omap chip type simpler.

Also introduce OMAP1_IO_ADDRESS and OMAP2_IO_ADDRESS for future multi-omap
patches.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2008-07-03 12:24:44 +03:00
Tony Lindgren
e1f80bfca8 ARM: OMAP: Remove __REG access for multi-omap
This does not play nicely with multi-omap as it cannot be replaced
by a function in io.c for omaps with different IO bases.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2008-07-03 12:24:43 +03:00
Tony Lindgren
f35ae63468 ARM: OMAP: USB: Change omap USB code to use omap_read/write instead of __REG
Change omap USB code to use omap_read/write instead of __REG for multi-omap

Cc: David Brownell <david-b@pacbell.net>
Cc: linux-usb@vger.kernel.org
Cc: i2c@lm-sensors.org
Signed-off-by: Tony Lindgren <tony@atomide.com>
2008-07-03 12:24:43 +03:00
Tony Lindgren
030b15457d ARM: OMAP: Change omap_cf.c and omap_nor.c to use omap_readw/writew instead of __REG
Change omap_cf.c and omap_nor.c to use omap_readw/writew instead of __REG.
This is needed for multi-omap in the future.

Cc: David Brownell <david-b@pacbell.net>
Cc: linux-pcmcia@lists.infradead.org
Cc: linux-mtd@lists.infradead.org
Signed-off-by: Tony Lindren <tony@atomide.com>
2008-07-03 12:24:41 +03:00
Hiroshi DOYU
137b3ee27a ARM: OMAP: CLKFW: Initial debugfs support for omap clock framework
debugfs can provide the infrastructure to trace the dependencies of
clock tree hierarchy quite visibly. This patch enables to keep track
of clock tree hierarchy and expose their attributes under each clock
directry as below:

	omap:~# tree -d -L 2 /debug/clock/omap_32k_fck/
	/debug/clock/omap_32k_fck/
	|-- gpt10_fck
	|-- gpt11_fck
	|-- gpt1_fck
	|-- per_32k_alwon_fck
	|   |-- gpio2_fck
	|   |-- gpio3_fck
	|   |-- gpio4_fck
	|   |-- gpio5_fck
	|   |-- gpio6_fck
	|   `-- wdt3_fck
	|-- ts_fck
	`-- wkup_32k_fck
	    |-- gpio1_fck
	    `-- wdt2_fck

	14 directories
	omap:~# tree  /debug/clock/omap_32k_fck/gpt10_fck/
	/debug/clock/omap_32k_fck/gpt10_fck/
	|-- flags
	|-- rate
	`-- usecount

	0 directories, 3 files

Although, compared with David Brownell's small patch, this may look
bit overkilling, I expect that this debugfs can deal with other PRCM
complexities at the same time. For example, powerdomain dependencies
can be expressed by using symbolic links of these clocks if
powerdomain supports dubgfs as well.

Signed-off-by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2008-07-03 12:24:41 +03:00
Tony Lindgren
44f78f43b3 ARM: OMAP: Clean up interrupt lines to fix warnings for multi-omap
If boards with different NR_IRQS are compiled together, tons of
compiler warnings are emitted about redefining NR_IRQS.

This patch fixes the problem by adding up NR_IRQS in a common place.

Patch also removes quite a bit of now unnecessary code.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2008-07-03 12:24:41 +03:00
Eduardo Valentin
bc5d0c89c8 ARM: OMAP: McBSP: Prepare for splitting into omap1 and omap2 code
This patch transform mcbsp code to use platform data
from arch/arm/plat-omap/devices.c

It also gets ride of ifdefs on mcbsp.c code.
To do it, a platform data structure was defined.

Signed-off-by: Eduardo Valentin <eduardo.valentin@indt.org.br>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2008-07-03 12:24:39 +03:00
Tony Lindgren
c2d43e39c7 ARM: OMAP: SRAM: Split sram24xx.S into sram242x.S and sram243x.S
Split sram24xx.S into sram242x.S and sram243x.S

Signed-off-by: Tony Lindgren <tony@atomide.com>
2008-07-03 12:24:38 +03:00
Tony Lindgren
97b7f71558 ARM: OMAP: DMA: Clean-up code
DMA clean-up, mostly checkpatch.pl fixes.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2008-07-03 12:24:37 +03:00
Tony Lindgren
0499bdeb1d ARM: OMAP: DMA: Remove __REG access
Remove __REG access in DMA code, use dma_read/write instead:

- dynamically set the omap_dma_base based on the omap type
- omap_read/write becomes dma_read/write
- dma channel registers are read with dma_ch_read/write

Cc: David Brownell <david-b@pacbell.net>
Cc: linux-usb@vger.kernel.org
Signed-off-by: Tony Lindgren <tony@atomide.com>
2008-07-03 12:24:36 +03:00
Tony Lindgren
4d96372e6d ARM: OMAP: DMA: Make channels dynamic for multi-boot
Make DMA channels dynamic for multi-boot

Signed-off-by: Tony Lindgren <tony@atomide.com>
2008-07-03 12:24:31 +03:00
Paul Walmsley
4a79acdc78 ARM: OMAP: Add OMAP3430 base defines
Add symbolic constants for OMAP3430 base addresses; include that file
in hardware.h.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2008-07-03 12:24:31 +03:00
Richard Woodruff
3fddd09e59 ARM: OMAP: DMTimer: Optimize by adding load and start
This patch optimizes the timer load and start sequence.  By combining the
load and start a needless posted wait can be removed from the system timer
execution path.

* Before patch register writes are taking up .078% @ 500MHz during idle.

 Address                 |total  |min  |max      |avr     |count|ratio%
 old\process\default_idle|7.369s |0.0us|999.902ms|14.477ms|509. |62.661%
 ld\Global\cpu_v7_do_idle|4.265s |0.0us|375.786ms|24.374ms|175. |36.270%
                (UNKNOWN)|17.503ms|0.us|531.080us|5.119us|3419. |0.148%
 r\omap_dm_timer_set_load|8.135ms|0.0us|79.887us|15.065us|540.  |0.069% <--
 \vmlinux-old\Global\_end|2.023ms|0.0us|4.000us|0.560us|3613.   |0.017%
 -old\Global\__raw_readsw|1.962ms|0.0us|108.610us|9.167us|214.  |0.016%
 old\smc91x\smc_interrupt|1.353ms|0.0us|10.212us|2.348us|576.   |0.011%
 s/namei\__link_path_walk|1.161ms|0.0us|4.310us|0.762us|  1524. |0.009%
 \omap_dm_timer_write_reg|1.085ms|0.0us|126.150us|2.153us|504.  |0.009% <--

* After patch timer functions do not show up in top listings for long captures.

Signed-off-by: Richard Woodruff <r-woodruff2@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2008-07-03 12:24:30 +03:00
Saeed Bishara
f4db56ffd4 [MTD] orion_nand: add chip_delay parameter
Some SoCs need a different chip_delay value.

Signed-off-by: Saeed Bishara <saeed@marvell.com>
Acked-by: Jörn Engel <joern@logfs.org>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
2008-06-30 16:04:45 -04:00
Saeed Bishara
1338760329 [ARM] Kirkwood: support L2 writeback mode
This patch allows booting Kirkwood with the L2 in writeback mode,
by reading the WT override bit from the L2 config register and
passing that into the Feroceon L2 init routine, instead of assuming
that the WT override bit will always be set

Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-30 14:25:24 -04:00
Jens Axboe
f6dd9fa5a7 arm: convert to generic helpers for IPI function calls
This converts arm to use the new helpers for smp_call_function() and
friends, and adds support for smp_call_function_single().

Fixups and testing done by Catalin Marinas <catalin.marinas@arm.com>

Cc: Russell King <rmk@arm.linux.org.uk>
Signed-off-by: Jens Axboe <jens.axboe@oracle.com>
2008-06-26 11:22:57 +02:00
Abhishek Sagar
395a59d0f8 ftrace: store mcount address in rec->ip
Record the address of the mcount call-site. Currently all archs except sparc64
record the address of the instruction following the mcount call-site. Some
general cleanups are entailed. Storing mcount addresses in rec->ip enables
looking them up in the kprobe hash table later on to check if they're kprobe'd.

Signed-off-by: Abhishek Sagar <sagar.abhishek@gmail.com>
Cc: davem@davemloft.net
Cc: Steven Rostedt <rostedt@goodmis.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-06-23 22:10:56 +02:00
Stanislav Samsonov
794d15b25d [ARM] add Marvell 78xx0 ARM SoC support
The Marvell Discovery Duo (MV78xx0) is a family of ARM SoCs featuring
(depending on the model) one or two Feroceon CPU cores with 512K of L2
cache and VFP coprocessors running at (depending on the model) between
800 MHz and 1.2 GHz, and features a DDR2 controller, two PCIe
interfaces that can each run either in x4 or quad x1 mode, three USB
2.0 interfaces, two 3Gb/s SATA II interfaces, a SPI interface, two
TWSI interfaces, a crypto accelerator, IDMA/XOR engines, a SPI
interface, four UARTs, and depending on the model, two or four gigabit
ethernet interfaces.

This patch adds basic support for the platform, and allows booting
on the MV78x00 development board, with functional UARTs, SATA, PCIe,
GigE and USB ports.

Signed-off-by: Stanislav Samsonov <samsonov@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 22:45:10 +02:00
Lennert Buytenhek
a9311cfed2 [ARM] Orion: PCIe x4/x1 detection support
The Discovery Duo (MV78xx0) has two x4 PCIe ports which can either
be used in x4 mode or in quad x1 mode.  This patch adds an accessor
function to the generic plat-orion PCIe handling code to detect in
which of the two modes we're running (which is determined by strap
pins and/or configured by the bootloader).

Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 22:45:09 +02:00
Saeed Bishara
651c74c74b [ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.

This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.

Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 22:45:06 +02:00
Lennert Buytenhek
99c6dc117d [ARM] Feroceon: L2 cache support
This patch adds support for the unified Feroceon L2 cache controller
as found in e.g. the Marvell Kirkwood and Marvell Discovery Duo
families of ARM SoCs.

Note that:

- Page table walks are outer uncacheable on Kirkwood and Discovery
  Duo, since the ARMv5 spec provides no way to indicate outer
  cacheability of page table walks (specifying it in TTBR[4:3] is
  an ARMv6+ feature).

  This requires adding L2 cache clean instructions to
  proc-feroceon.S (dcache_clean_area(), set_pte()) as well as to
  tlbflush.h ({flush,clean}_pmd_entry()).  The latter case is handled
  by defining a new TLB type (TLB_FEROCEON) which is almost identical
  to the v4wbi one but provides a TLB_L2CLEAN_FR flag.

- The Feroceon L2 cache controller supports L2 range (i.e. 'clean L2
  range by MVA' and 'invalidate L2 range by MVA') operations, and this
  patch uses those range operations for all Linux outer cache
  operations, as they are faster than the regular per-line operations.

  L2 range operations are not interruptible on this hardware, which
  avoids potential livelock issues, but can be bad for interrupt
  latency, so there is a compile-time tunable (MAX_RANGE_SIZE) which
  allows you to select the maximum range size to operate on at once.
  (Valid range is between one cache line and one 4KiB page, and must
  be a multiple of the line size.)

Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 22:45:04 +02:00
Stanislav Samsonov
836a8051d5 [ARM] Feroceon: L1 cache range operation support
This patch adds support for the L1 D cache range operations that
are supported by the Marvell Discovery Duo and Marvell Kirkwood
ARM SoCs.

Signed-off-by: Stanislav Samsonov <samsonov@marvell.com>
Acked-by: Saeed Bishara <saeed@marvell.com>
Reviewed-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 22:45:03 +02:00
Lennert Buytenhek
777f9bebad [ARM] add Marvell Loki (88RC8480) SoC support
The Marvell Loki (88RC8480) is an ARM SoC based on a Feroceon CPU
core running at between 400 MHz and 1.0 GHz, and features a 64 bit
DDR controller, 512K of internal SRAM, two x4 PCI-Express ports,
two Gigabit Ethernet ports, two 4x SAS/SATA controllers, two UARTs,
two TWSI controllers, and IDMA/XOR engines.

This patch adds support for the Marvell LB88RC8480 Development
Board, enabling the use of the PCIe interfaces, the ethernet
interfaces, the TWSI interfaces and the UARTs.

Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 22:45:02 +02:00
Ke Wei
1219715de7 [ARM] Orion: add a separate BRIDGE_INT_TIMER1_CLR define
Some Feroceon-based SoCs have an MBUS bridge interrupt controller
that requires writing a one instead of a zero to clear edge
interrupt sources such as timer expiry.

This patch adds a new BRIDGE_INT_TIMER1_CLR define, which platform
code can set to either ~BRIDGE_INT_TIMER1 (write-zero-to-clear) or
BRIDGE_INT_TIMER1 (write-one-to-clear) depending on the platform.

Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 22:45:01 +02:00
Lennert Buytenhek
79e90dd5aa [ARM] Orion: nuke orion5x_{read,write}
Nuke the Orion-specific orion5x_{read,write} wrappers.

Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 22:44:57 +02:00
Lennert Buytenhek
0e3bc0503f [ARM] Orion: use linux/serial_reg.h for Orion uncompress.h
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 22:44:56 +02:00
Lennert Buytenhek
d2b2a6bbc0 [ARM] Orion: add 88F5181L (Orion-VoIP) support
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Russell King <linux@arm.linux.org.uk>
2008-06-22 22:44:51 +02:00
Lennert Buytenhek
6eef84a549 [ARM] Orion: delete unused IO_SPACE_REMAP define
This define isn't used anywhere in the kernel tree -- nuke it.

Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Russell King <linux@arm.linux.org.uk>
2008-06-22 22:44:44 +02:00
Nicolas Pitre
2239aff6ab [ARM] cache align destination pointer when copying memory for some processors
The implementation for memory copy functions on ARM had a (disabled)
provision for aligning the source pointer before loading registers with
data.  Turns out that aligning the _destination_ pointer is much more
useful, as the read side is already sufficiently helped with the use of
preload.

So this changes the definition of the CALGN() macro to target the
destination pointer instead, and turns it on for Feroceon processors
where the gain is very noticeable.

Signed-off-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 22:44:38 +02:00
Ingo Molnar
e765ee90da Merge branch 'linus' into tracing/ftrace 2008-06-16 11:15:58 +02:00
Stefan Schmidt
9fc697b0b0 [ARM] 5082/1: pxa: Definition for the third USB port control register UP3OCR
This adds the definition for the third USB port control register UP3OCR. It is
used on the EZX GSM mobile phones.

Signed-off-by: Stefan Schmidt <stefan@datenfreihafen.org>
Acked-by: Eric Miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-06-15 19:54:31 +01:00
Stefan Schmidt
3692fd0aae [ARM] 5091/1: Add missing bitfield include to regs-lcd.h
Macros like Fld() or FShft used in regs-lcd.h are defined in bitfield.h, but
the latter is not included.
Also fix one whitespace issue while being there.

Signed-off-by: Antonio Ospite <ao2@openezx.org>
Signed-off-by: Stefan Schmidt <stefan@datenfreihafen.org>
Acked-by: Eric Miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-06-12 20:49:38 +01:00
Håvard Skinnemoen
3c3796cc32 [MTD] [NAND] rename at91_nand -> atmel_nand: internal symbols
This is basically s/at91_nand/atmel_nand/g with some manual inspection.

Signed-off-by: Håvard Skinnemoen <haavard.skinnemoen@atmel.com>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
2008-06-07 08:43:00 +01:00
Håvard Skinnemoen
d4f4c0aa8e [MTD] [NAND] rename at91_nand -> atmel_nand: file names and Kconfig
The AT91 NAND driver needs just a few tiny modifications to work on
AVR32 as well. Rename it atmel_nand to reflect this.

Also move the ECC register definitions into drivers/mtd/nand since they
are only useful to the atmel_nand driver, and get rid of the useless
filename at the top of each file.

Signed-off-by: Håvard Skinnemoen <haavard.skinnemoen@atmel.com>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
2008-06-07 08:42:51 +01:00
Russell King
0b0a9df603 [ARM] pxa: separate out power manager and clock registers
The power manager and core clock registers aren't present in PXA3
CPUs.  Move them out of pxa-regs.h into pxa2xx-regs.h, and include
pxa2xx-regs.h where necessary.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-06-02 19:33:27 +01:00
Nicolas Ferre
ba45ca4350 [ARM] 4940/1: AT91: UDPHS driver: SAM9RL board and cpu integration.
Adds support for the USB High Speed Device Port on the AT91SAM9RL
system on chip. The AT91SAM9RL uses the same UDPHS IP as the AVR32 and
the AT91CAP9 (atmel_usba_udc driver).

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-06-02 15:08:13 +01:00
Stelian Pop
7c8cf66529 [ARM] 4934/1: AT91CAP9 UDPHS driver: board and cpu integration.
This is patch 2 of 2 adding support for the USB High Speed Device Port
on the AT91CAP9 system on chip. The AT91CAP9 uses the same UDPHS IP
as the AVR32 and the AT91SAM9RL.

This patch declares the UDPHS ressources in the at91cap9 (cpu and
adk board) files, wires up the atmel_usba_udc driver to them,
and activates the driver in the defconfig.

Signed-off-by: Stelian Pop <stelian@popies.net>
Acked-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Acked-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-06-02 15:08:09 +01:00
Stelian Pop
53d7168026 [ARM] 4933/1: AT91CAP9 UDPHS driver: generic AT91 parts.
This is patch 1 of 2 adding support for the USB High Speed Device Port
on the AT91CAP9 system on chip. The AT91CAP9 uses the same UDPHS IP
as the AVR32 and the AT91SAM9RL.

This patch makes the generic AT91 adaptations, mainly dealing with
the addition of the UDPHS UTMI clock.

Signed-off-by: Stelian Pop <stelian@popies.net>
Acked-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Acked-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-06-02 15:08:07 +01:00
Andrew Victor
ca0a789ab9 [ARM] 5057/1: [AT91] Calao Systems - board files
Add support for three AT91-based boards available from Calao Systems:
USB_A9260, USB_A9263 and QIL_A9260.

Signed-off-by: Grégory Hermant <gregory.hermant@calao-systems.com>
Signed-off-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-06-02 13:53:10 +01:00
Dmitry Baryshkov
1a7e612fa5 [ARM] 5074/1: fix warning: missing terminating ' character
Signed-off-by: Dmitry Baryshkov <dbaryshkov@gmail.com>
Acked-by: Richard Purdie <rpurdie@rpsys.net>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-06-02 13:49:12 +01:00
surinder
1e5c594607 [ARM] 5067/1: _raw_write_can_lock macro bugfix
The current __raw_write_can_lock macro tests whether the lock can be
locked by checking if it is equal to 0x80000000, whereas the lock
should be lockable if its value is 0 i.e. unlocked state is
represented by 0. Hence the macro should test the value of lock
against 0 and not 0x80000000.

Signed-off-by: Surinder Pal Singh <srplsnh@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-06-02 13:44:17 +01:00
Philipp Zabel
ea6a7404da [ARM] 5070/1: pxa: add GPIO104_PSKTSEL to pxa27x MFP configuration
PSKTSEL can be routed to GPIO pin 104. This configuration is used by
HP iPAQ hx4700.

Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com>
Acked-by: Jrgen Schindele <linux@schindele.name>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-06-02 13:42:24 +01:00
Jonathan Cameron
106f62701f [ARM] 5068/1: PXA2xx Additional gpio definitions
Some additional alternate gpio definitions relating
to FFUART and USB on the pxa27x. These are used on
the xbow imote2 platform.

Signed-off-by: Jonathan Cameron <jic23@cam.ac.uk>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-06-02 13:42:23 +01:00
Abhishek Sagar
e077341024 ftrace: export kretprobe_trampoline for function tracer
Follow suit from kprobe implementations on other archs and make kretprobe_trampoline non-static. Ftrace implmentation (more specifically, kernel/trace/trace.c) requires access to it (see-> http://kerneltrap.org/mailarchive/linux-kernel/2008/5/27/1955234).

Signed-off-by: Abhishek Sagar <sagar.abhishek@gmail.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-06-02 13:32:10 +02:00
Greg Ungerer
759e9408ad [ARM] 5060/1: remove unnecessary include of asm/io.h
Remove unnecessary include of asm/io.h.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-06-01 11:22:25 +01:00
Russell King
ee48a75c95 [ARM] fix AT91 include loops
AT91 has one include loop in its header files:

  include/asm-arm/io.h <- include/asm-arm/arch-at91/io.h <-
   include/asm-arm/io.h

Circular include dependencies are dangerous since they can result in
inconsistent definitions being provided to other code, especially if
'#ifndef' constructs are used.

Solve this by removing the offending includes.  Built tested using my
AT91 configuration.

Acked-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-06-01 11:19:54 +01:00
Uwe Kleine-König
e22af66fc8 Merge branch 'atags' into for-rmk 2008-05-30 10:46:30 +02:00
Uwe Kleine-König
a4831fbe09 ns9xxx: fix assembler version of __REG2 to be consistent with the C version
It's not very critical because __REG2 isn't used in assembler code
currently.

Additionally some white space noise is fixed.

Signed-off-by: Uwe Kleine-König <Uwe.Kleine-Koenig@digi.com>
2008-05-30 10:46:11 +02:00
Uwe Kleine-König
8ff7f2a46b There is no need to have BOOT_PARAMS_SIZE known outside of atags.c
atags.c was the only user of KEXEC_BOOT_PARAMS_SIZE and kexec.h
was only included to get that definition.

Signed-off-by: Uwe Kleine-König <Uwe.Kleine-Koenig@digi.com>
Acked-by: Uli Luckas <u.luckas@road.de>
2008-05-30 10:30:05 +02:00
Russell King
cfb41bf756 [ARM] fix OMAP include loops
OMAP has two include loops in its header files:

  asm-arm/hardware.h <- asm-arm/arch-omap/io.h <-
   asm-arm/arch-omap/hardware.h <- asm-arm/hardware.h

  asm-arm/arch-omap/board-palmte.h <-
   asm-arm/arch-omap/hardware.h <- asm-arm/hardware.h <-
   asm-arm/arch-omap/gpio.h <- asm-arm/arch-omap/board-palmte.h

Circular include dependencies are dangerous since they can result in
inconsistent definitions being provided to other code, especially if
'#ifndef' constructs are used.

Solve these by removing the offending includes, and add additional
includes where necessary.

Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-05-23 15:38:07 +01:00
Greg Ungerer
415ad1e50a [ARM] 5053/1: define before use of processor_id
For the simple read_cpuid() macro case the variable processor_id has
no definition on use of the macro. Add an extern for it. Move all the
processor ID macros into the #ifndef __ASSEMBLEY__ block.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-05-23 13:50:08 +01:00
Greg Ungerer
50346e6212 [ARM] 5051/1: define pgtable_t for the !CONFIG_MMU case too
The non-MMU case also needs the type definition of pgtable_t.
So move it out of a CONFIG_MMU conditional section.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-05-23 13:50:05 +01:00
Russell King
b851cb289d [ARM] omap: fix omap clk support build errors
arch/arm/plat-omap/clock.c:397: warning: "struct cpufreq_frequency_table" declared inside parameter list
arch/arm/plat-omap/clock.c:397: warning: its scope is only this definition or declaration, which is probably not what you want
arch/arm/plat-omap/clock.c: In function `clk_init_cpufreq_table':
arch/arm/plat-omap/clock.c:402: error: structure has no member named `clk_init_cpufreq_table'
arch/arm/plat-omap/clock.c:403: error: structure has no member named `clk_init_cpufreq_table'

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-05-22 16:38:50 +01:00
Russell King
bedd78ca78 [RTC] remove old ARM rtc library code
Now that all drivers using it are gone, remove the old ARM RTC library.

Acked-by: Alessandro Zummo <a.zummo@towertech.it>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-05-22 14:56:41 +01:00
Thomas Kunze
864d0ec9db [ARM] 5025/2: fix collie cpu initialisation
collie.h:
     * add some meaningfull names to some gpios
collie.c:
    * initialize cpu registers correctly

Signed-off-by: Thomas Kunze <thommycheck@gmx.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-05-22 14:03:20 +01:00
Russell King
284d115ec9 [ARM] pxa: separate PXA25x and PXA27x UDC register definitions
The PXA25x and PXA27x USB device controller register definitions are
different.  Currently, they live side by side in pxa-regs.h, but only
one set is available depending on the setting of PXA25x or PXA27x.

This means that if we build to support both PXA25x and PXA27x, the
PXA27x definitions are unavailable, even to PXA27x specific code.

Remove these definitions from pxa-regs.h, and place them in separate
files.  Include these files where appropriate.

Note: according to the dependencies in drivers/usb/gadget/Kconfig,
we do not support the UDC on PXA27x nor PXA3xx CPUs, so remove the
platform devices from pxa27x.c and pxa3xx.c.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-05-19 16:25:58 +01:00
Russell King
dfb0ae0914 Merge branch 'omap-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6 2008-05-17 22:56:29 +01:00
Russell King
1da7807842 Merge branch 'sa1100' 2008-05-17 22:55:51 +01:00
Mariusz Kozlowski
1df5a8d004 [ARM] fix parenthesis in include/asm-arm/arch-omap/control.h
Parenthesis fix in include/asm-arm/arch-omap/control.h

Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Tony Lindgren <tony@atomide.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-05-17 22:55:19 +01:00
Thomas Kunze
2a52efb2ce [ARM] 5026/1: locomo: add .settype for gpio and several small fixes
irqs.h:
    * rename IRQ_LOCOMO_SPI_OVRN to IRQ_LOCOMO_SPI_REND
locomo.h:
    * add some definition for locomo spi controller
    * correct some errors
locomo.c:
    * correct some errors
    * add set_type for locomo gpio irq chip

Signed-off-by: Thomas Kunze <thommycheck@gmx.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-05-17 22:53:54 +01:00
Russell King
205bee6ad8 [ARM] dyntick: Remove obsolete and unused ARM dyntick support
dyntick is superseded by the clocksource/clockevent infrastructure,
using the NO_HZ configuration option.  No one implements dyntick on
ARM anymore, so it's pointless keeping it around.  Remove dyntick
support.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-05-12 17:39:14 +01:00
Paul Walmsley
c8d2eb8e56 ARM: OMAP: Add calls to omap2_set_globals_*()
Add the omap2_set_globals_{242x,243x,343x}() functions. These
functions are called early upon boot in the map_io() functions in the
board-specific init files.

This patch was accidentally left out of the earlier series.

This fixes omap2 booting as noted by Kyungmin Park <kmpark@infradead.org>.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kyungmin Park <kmpark@infradead.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2008-05-09 10:25:02 -07:00
Tony Lindgren
0a4b53a22d ARM: OMAP: Update MMC header to fix compile
Update MMC header from linux-omap tree to match the recent
MMC driver updates.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2008-05-09 10:24:47 -07:00
Russell King
dc38e2ad53 [ARM] pxa: Fix RCSR handling
Related to d3930614e6.

RCSR is only present on PXA2xx CPUs, not on PXA3xx CPUs.  Therefore,
we should not be unconditionally writing to RCSR from generic code.

Since we now clear the RCSR status from the SoC specific PXA PM code
and before reset in the arch_reset() function, the duplication in
the corgi, poodle, spitz and tosa code can be removed.

Acked-by: Richard Purdie <rpurdie@rpsys.net>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-05-08 18:04:02 +01:00
Robert Jarzmik
649de51b88 [ARM] 5027/1: Fixed random memory corruption on pxa suspend cycle.
Each time a pxa type cpu went in suspend, a portion of
kmalloc memory was corrupted.
The issue was an incorrect length allocation introduced by
the commit 711be5ccfe for
the save registers array (=> overflow).

Signed-off-by: Robert Jarzmik <rjarzmik@free.fr>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-05-04 11:06:05 +01:00
H. Peter Anvin
4cc1a102b0 arm: types: use <asm-generic/int-*.h> for the arm architecture
This modifies <asm-arm/types.h> to use the <asm-generic/int-*.h>
generic include files.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Cc: Russell King <rmk@arm.linux.org.uk>
Cc: Lennert Buytenhek <kernel@wantstofly.org>
Cc: Ben Dooks <ben-linux@fluff.org>
2008-05-02 16:18:20 -07:00
Adrian Bunk
e055d5bff3 [ARM] 5015/1: arm: remove ARCH_CO285
Trying to compile a kerel for ARCH_CO285 fails with the following error:

<--  snip  -->

...
  CC      arch/arm/mach-footbridge/dc21285.o
/home/bunk/linux/kernel-2.6/git/linux-2.6/arch/arm/mach-footbridge/dc21285.c:
In function 'dc21285_base_address':
/home/bunk/linux/kernel-2.6/git/linux-2.6/arch/arm/mach-footbridge/dc21285.c:54: error: 'PCICFG0_BASE' undeclared (first use in this function)
/home/bunk/linux/kernel-2.6/git/linux-2.6/arch/arm/mach-footbridge/dc21285.c:54: error: (Each undeclared identifier is reported only once
/home/bunk/linux/kernel-2.6/git/linux-2.6/arch/arm/mach-footbridge/dc21285.c:54: error: for each function it appears in.)
/home/bunk/linux/kernel-2.6/git/linux-2.6/arch/arm/mach-footbridge/dc21285.c:57: error: 'PCICFG1_BASE' undeclared (first use in this function)
/home/bunk/linux/kernel-2.6/git/linux-2.6/arch/arm/mach-footbridge/dc21285.c:
In function 'dc21285_scan_bus':
/home/bunk/linux/kernel-2.6/git/linux-2.6/arch/arm/mach-footbridge/dc21285.c:286: error: implicit declaration of function 'pci_scan_bus'
...
make[2]: *** [arch/arm/mach-footbridge/dc21285.o] Error 1

<--  snip  -->

This does not seem to be a recent breakage.

The ARCH_CO285 support is old - kernel 2.2.0 contains first traces of
it, an it seems to have been pretty complete in later 2.2 kernels.

Since it seems to be completely dead code now this patch therefore
removes it.

Signed-off-by: Adrian Bunk <bunk@kernel.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-05-02 23:44:57 +01:00
Roman Zippel
6f6d6a1a6a rename div64_64 to div64_u64
Rename div64_64 to div64_u64 to make it consistent with the other divide
functions, so it clearly includes the type of the divide.  Move its definition
to math64.h as currently no architecture overrides the generic implementation.
 They can still override it of course, but the duplicated declarations are
avoided.

Signed-off-by: Roman Zippel <zippel@linux-m68k.org>
Cc: Avi Kivity <avi@qumranet.com>
Cc: Russell King <rmk@arm.linux.org.uk>
Cc: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: David Howells <dhowells@redhat.com>
Cc: Jeff Dike <jdike@addtoit.com>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: "David S. Miller" <davem@davemloft.net>
Cc: Patrick McHardy <kaber@trash.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2008-05-01 08:03:58 -07:00
Eric Miao
3c42a44910 pxafb: preliminary smart panel interface support
Signed-off-by: Daniel Mack <daniel@caiaq.de>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Cc: "Antonino A. Daplas" <adaplas@pol.net>
Cc: Russell King <rmk@arm.linux.org.uk>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2008-04-30 08:29:32 -07:00
eric miao
84f43c308b pxafb: introduce register independent LCD connection type for pxafb
Reasons:

  1. straight forward: the name "LCD_COLOR_DSTN_16BPP" is much better
     than "LCCR0_Pas | LCCR0_Color | LCCR0_Dual"

  2. by defining LCD connection types as constants, it allows only
     valid possibilities

  3. by removing the dependency of register bits definitions, those
     can be later moved into the body of pxafb.c, instead of having
     a regs-lcd.h around

Currently, only lubbock, mainstone, zylonite and littleton have been
modified to support these types (see coming patches after this).
Other platforms are encouraged to change their way describing the
LCD controller connections.

Signed-off-by: eric miao <eric.miao@marvell.com>
Cc: "Antonino A. Daplas" <adaplas@pol.net>
Cc: Russell King <rmk@arm.linux.org.uk>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2008-04-30 08:29:31 -07:00
eric miao
ce4fb7b892 pxafb: convert fb driver to use ioremap() and __raw_{readl, writel}
This is part of the effort moving peripheral registers outside of pxa-regs.h,
and using ioremap() make it possible the same IP can be re-used on different
processors with different registers space

As a result, the fixed mapping in pxa_map_io() is removed.

The regs-lcd.h can actually moved to where closer to pxafb.c but some of its
bit definitions are directly used by various platform code, though this is not
a good style.

Signed-off-by: eric miao <eric.miao@marvell.com>
Cc: "Antonino A. Daplas" <adaplas@pol.net>
Cc: Russell King <rmk@arm.linux.org.uk>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2008-04-30 08:29:31 -07:00
Linus Torvalds
d973664992 Merge master.kernel.org:/home/rmk/linux-2.6-arm
* master.kernel.org:/home/rmk/linux-2.6-arm: (26 commits)
  [ARM] pxa: fix 1c104e0e4f
  [ARM] serial: s3c2410: platform_get_irq() may return signed unnoticed
  [ARM] am79c961a: platform_get_irq() may return signed unnoticed
  [ARM] Feroceon: Feroceon-specific WA-cache compatible {copy,clear}_user_page()
  [ARM] Feroceon: fix function alignment in proc-feroceon.S
  [ARM] Orion: catch a couple more alternative spellings of PCIe
  [ARM] Orion: fix orion-ehci platform resource end addresses
  [ARM] Orion: fix ->map_irq() PCIe bus number check
  [ARM] Orion: fix ioremap() optimization
  [ARM] feroceon: remove CONFIG_CPU_CACHE_ROUND_ROBIN check
  [ARM] feroceon: remove CONFIG_CPU_DCACHE_WRITETHROUGH check
  kprobes/arm: fix decoding of arithmetic immediate instructions
  kprobes/arm: fix cache flush address for instruction stub
  [ARM] 5022/1: Race in ARM MMCI PL18x driver, V2
  [ARM] 5021/1: at91: buildfix for sam9263 + PM
  [ARM] 5018/1: RealView: Fix the ARM11MPCore Oprofile compilation
  [ARM] 5016/1: AT91: typo in mci configuration for at91cap at91sam9263
  [ARM] 5017/1: pxa3xx: Report unsupported wakeup sources in pxa3xx_set_wake()
  [ARM] 5020/1: magician: remove __devinit marker from pasic3_leds_info
  [ARM] 5014/1: Cleanup reset state before entering suspend or resetting.
  ...
2008-04-29 15:18:06 -07:00
Russell King
9d87dd97ff Merge branch 'orion-fixes2' 2008-04-29 21:31:13 +01:00
Russell King
92794a5d63 Merge branches 'pxa' and 'orion-fixes1' 2008-04-29 21:31:06 +01:00
Harvey Harrison
6510d41954 kernel: Move arches to use common unaligned access
Unaligned access is ok for the following arches:
cris, m68k, mn10300, powerpc, s390, x86

Arches that use the memmove implementation for native endian, and
the byteshifting for the opposite endianness.
h8300, m32r, xtensa

Packed struct for native endian, byteshifting for other endian:
alpha, blackfin, ia64, parisc, sparc, sparc64, mips, sh

m86knommu is generic_be for Coldfire, otherwise unaligned access is ok.

frv, arm chooses endianness based on compiler settings, uses the byteshifting
versions.  Remove the unaligned trap handler from frv as it is now unused.

v850 is le, uses the byteshifting versions for both be and le.

Remove the now unused asm-generic implementation.

Signed-off-by: Harvey Harrison <harvey.harrison@gmail.com>
Acked-by: David S. Miller <davem@davemloft.net>
Cc: <linux-arch@vger.kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2008-04-29 08:06:27 -07:00
Lennert Buytenhek
0ed1507183 [ARM] Feroceon: Feroceon-specific WA-cache compatible {copy,clear}_user_page()
This patch implements a set of Feroceon-specific
{copy,clear}_user_page() routines that perform more optimally than
the generic implementations.  This also deals with write-allocate
caches (Feroceon can run L1 D in WA mode) which otherwise prevents
Linux from booting.

[nico: optimized the code even further]

Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Tested-by: Sylver Bruneau <sylver.bruneau@googlemail.com>
Tested-by: Martin Michlmayr <tbm@cyrius.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
2008-04-28 16:06:51 -04:00
Nicolas Pitre
fd153abb01 [ARM] Orion: fix ioremap() optimization
The ioremap() optimization used for internal register didn't cope
with the fact that paddr + size can wrap to zero if the area extends
to the end of the physical address space.

Issue isolated by Sylver Bruneau <sylver.bruneau@googlemail.com>.

Signed-off-by: Nicolas Pitre <nico@marvell.com>
2008-04-28 15:57:41 -04:00
Nick Piggin
7e675137a8 mm: introduce pte_special pte bit
s390 for one, cannot implement VM_MIXEDMAP with pfn_valid, due to their memory
model (which is more dynamic than most).  Instead, they had proposed to
implement it with an additional path through vm_normal_page(), using a bit in
the pte to determine whether or not the page should be refcounted:

vm_normal_page()
{
	...
        if (unlikely(vma->vm_flags & (VM_PFNMAP|VM_MIXEDMAP))) {
                if (vma->vm_flags & VM_MIXEDMAP) {
#ifdef s390
			if (!mixedmap_refcount_pte(pte))
				return NULL;
#else
                        if (!pfn_valid(pfn))
                                return NULL;
#endif
                        goto out;
                }
	...
}

This is fine, however if we are allowed to use a bit in the pte to determine
refcountedness, we can use that to _completely_ replace all the vma based
schemes.  So instead of adding more cases to the already complex vma-based
scheme, we can have a clearly seperate and simple pte-based scheme (and get
slightly better code generation in the process):

vm_normal_page()
{
#ifdef s390
	if (!mixedmap_refcount_pte(pte))
		return NULL;
	return pte_page(pte);
#else
	...
#endif
}

And finally, we may rather make this concept usable by any architecture rather
than making it s390 only, so implement a new type of pte state for this.
Unfortunately the old vma based code must stay, because some architectures may
not be able to spare pte bits.  This makes vm_normal_page a little bit more
ugly than we would like, but the 2 cases are clearly seperate.

So introduce a pte_special pte state, and use it in mm/memory.c.  It is
currently a noop for all architectures, so this doesn't actually result in any
compiled code changes to mm/memory.o.

BTW:
I haven't put vm_normal_page() into arch code as-per an earlier suggestion.
The reason is that, regardless of where vm_normal_page is actually
implemented, the *abstraction* is still exactly the same. Also, while it
depends on whether the architecture has pte_special or not, that is the
only two possible cases, and it really isn't an arch specific function --
the role of the arch code should be to provide primitive functions and
accessors with which to build the core code; pte_special does that. We do
not want architectures to know or care about vm_normal_page itself, and
we definitely don't want them being able to invent something new there
out of sight of mm/ code. If we made vm_normal_page an arch function, then
we have to make vm_insert_mixed (next patch) an arch function too. So I
don't think moving it to arch code fundamentally improves any abstractions,
while it does practically make the code more difficult to follow, for both
mm and arch developers, and easier to misuse.

[akpm@linux-foundation.org: build fix]
Signed-off-by: Nick Piggin <npiggin@suse.de>
Acked-by: Carsten Otte <cotte@de.ibm.com>
Cc: Jared Hulbert <jaredeh@gmail.com>
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2008-04-28 08:58:23 -07:00
Bartlomiej Zolnierkiewicz
4c3032d8a4 ide: add struct ide_io_ports (take 3)
* Add struct ide_io_ports and use it instead of `unsigned long io_ports[]`
  in ide_hwif_t.

* Rename io_ports[] in hw_regs_t to io_ports_array[].

* Use un-named union for 'unsigned long io_ports_array[]' and 'struct
  ide_io_ports io_ports' in hw_regs_t.

* Remove IDE_*_OFFSET defines.

v2:
* scc_pata.c build fix from Stephen Rothwell.

v3:
* Fix ctl_adrr typo in Sparc-specific part of ns87415.c.
  (Noticed by Andrew Morton)

Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
2008-04-27 15:38:32 +02:00
Dmitry Baryshkov
d3930614e6 [ARM] 5014/1: Cleanup reset state before entering suspend or resetting.
The kernel should clean stale bits from reset status, so that
they won't confuse the bootloader.

Signed-off-by: Dmitry Baryshkov <dbaryshkov@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-04-24 14:34:26 +01:00
Mike Rapoport
406b1ea441 [ARM] 5013/1: Change ITE8152 interrupt numbers
The patch kills the use of IRQ_GPIO() and adds
#if NR_IRQS < (IT8152_LAST_IRQ+1) statement.

Signed-off-by: Mike Rapoport <mike@compulab.co.il>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-04-24 14:34:25 +01:00
Ben Dooks
37e5ffa3f1 [MTD] [NAND] S3C2410 Allow ECC disable to be specified by the board
Add support to disable ECC checking for a given chip
when passed by the board via the platform data.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
2008-04-22 21:41:32 +01:00
Ben Dooks
1c21ab67b7 [MTD] [NAND] S3C2410 Allow ECC layout to be passed through platform data
Add support for the ECC layout to be passed via the
platform data specified by the board.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
2008-04-22 21:41:19 +01:00
Ben Dooks
c45c6c6833 [MTD] [NAND] S3C2410 Allow unset ecc to be ignored for ecc correction
If a block's ecc field is all 0xff, then ignore the ECC
correction. This is for systems where some of the blocks,
such as the initial cramfs are written without ECC and
need to be loaded on start.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
2008-04-22 21:41:03 +01:00
eric miao
fe69af002e [MTD] [NAND] support for pxa3xx
This is preliminary since:

1. It supports only _one_ chip select at the moment. As there is no
   existing platforms available using two chip selects of the NAND
   controller, it shall really not include code for supporting the
   2nd chip select for now, as such code cannot be verified.

2. It resorts to the default and simpliest memory based badblock
   table

3. Only limited types of nand flash are currently supported. Most
   PXA3xx processors come with on-chip NAND flash dies, so there
   isn't much flexibility for other types of NAND.

4. The NAND controller should be configured to detect the device's
   ID, thus making it difficult to use nand_scan_ident() to assist
   the detection process (though it's not impossible)

TODO: fix all the above limitations of cuz :-)

Signed-off-by: eric miao <eric.miao@marvell.com>
Cc: Sergey Podstavin <spodstavin@ru.mvista.com>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
2008-04-22 19:27:27 +01:00
Linus Torvalds
135cedad74 Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/drzeus/mmc
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/drzeus/mmc: (26 commits)
  mmc: sdio_ops.c should #include "sdio_ops.h"
  mmc: proper prototypes for mmc_attach_*()
  mmc: make __mmc_release_bus() static
  sdhci: improve no card, no reset quirk
  MMC: OMAP: Do not busy wait for end of command for ever
  MMC: OMAP: Start new commands from work queue instead of irq
  MMC: OMAP: Lazy clock shutdown
  MMC: OMAP: Move failing command abortion to workqueue
  MMC: OMAP: Use tasklet instead of workqueue for cover switch notification
  MMC: OMAP: Check the get_cover_state function pointer if not set
  MMC: OMAP: Using setup_timer instead of init_timer
  MMC: OMAP: Abort stuck commands
  MMC: OMAP: General cleanup for MMC multislot support
  MMC: OMAP: Power functions modified to MMC multislot support
  MMC: OMAP: Fix timeout calculation for MMC multislot support
  MMC: OMAP: New release dma and abort xfer functions
  MMC: OMAP: Add back cover switch support
  MMC: OMAP: Introduce new multislot structure and change driver to use it
  MMC: OMAP: Remove cover switch handling to allow adding multislot support
  MMC: OMAP: Fix the BYTEBLOCK capability removal
  ...
2008-04-21 17:23:30 -07:00
Linus Torvalds
e9b62693ae Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/juhl/trivial
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/juhl/trivial: (24 commits)
  DOC:  A couple corrections and clarifications in USB doc.
  Generate a slightly more informative error msg for bad HZ
  fix typo "is" -> "if" in Makefile
  ext*: spelling fix prefered -> preferred
  DOCUMENTATION:  Use newer DEFINE_SPINLOCK macro in docs.
  KEYS:  Fix the comment to match the file name in rxrpc-type.h.
  RAID: remove trailing space from printk line
  DMA engine: typo fixes
  Remove unused MAX_NODES_SHIFT
  MAINTAINERS: Clarify access to OCFS2 development mailing list.
  V4L: Storage class should be before const qualifier (sn9c102)
  V4L: Storage class should be before const qualifier
  sonypi: Storage class should be before const qualifier
  intel_menlow: Storage class should be before const qualifier
  DVB: Storage class should be before const qualifier
  arm: Storage class should be before const qualifier
  ALSA: Storage class should be before const qualifier
  acpi: Storage class should be before const qualifier
  firmware_sample_driver.c: fix coding style
  MAINTAINERS: Add ati_remote2 driver
  ...

Fixed up trivial conflicts in firmware_sample_driver.c
2008-04-21 16:36:46 -07:00
Tobias Klauser
b1d18dc06b arm: Storage class should be before const qualifier
The C99 specification states in section 6.11.5:

The placement of a storage-class specifier other than at the
beginning of the declaration specifiers in a declaration is an
obsolescent feature.

Signed-off-by: Tobias Klauser <tklauser@distanz.ch>
Signed-off-by: Jesper Juhl <jesper.juhl@gmail.com>
2008-04-21 22:26:40 +00:00
Philipp Zabel
ee008b4cdf [ARM] 5009/1: magician: remove to-be-deprecated defines for pxa_gpio_mode
Alternate function and direction setting is now handled
by the MFP config code or the generic GPIO API.

Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-04-21 12:47:49 +01:00
Russell King
cf816ecb53 Merge branch 'merge-fixes' into devel 2008-04-19 17:17:34 +01:00
Russell King
adf6d34e46 Merge branch 'omap2-upstream' into devel 2008-04-19 17:17:29 +01:00
Russell King
d1964dab60 Merge branches 'arm', 'at91', 'ep93xx', 'iop', 'ks8695', 'misc', 'mxc', 'ns9x', 'orion', 'pxa', 'sa1100', 's3c' and 'sparsemem' into devel 2008-04-19 17:17:25 +01:00
Guennadi Liakhovetski
3f3acefb63 [ARM] pxa: V4L2 soc_camera driver for PXA270
This patch adds a driver for the Quick Capture Interface on the PXA270.
It is based on the original driver from Intel, but has been re-worked
multiple times since then, now it also supports the V4L2 API.

Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@pengutronix.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-04-19 17:14:30 +01:00
Ryan Mallon
b685004f8d [ARM] 4988/1: Add GPIO lib support to the EP93xx
Adds support for the generic GPIO lib to the EP93xx family. The gpio
handling code has been moved from core.c to a new file called gpio.c.
The GPIO based IRQ code has not been changed.

Signed-off-by: Ryan Mallon <ryan@bluewatersys.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-04-19 14:01:43 +01:00
Russell King
05944d74bc [ARM] Add initial sparsemem support
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-04-19 11:36:48 +01:00
Dmitry Baryshkov
c546106cc1 [ARM] 5002/1: tosa: add two more leds
This adds support for two more leds:
the wlan one (found in SL-6000W and SL-6000L) and
the blutooth one (found in SL-6000W).

Signed-off-by: Dmitry Baryshkov <dbaryshkov@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-04-19 11:29:09 +01:00
Dmitry Baryshkov
ba4eb7e60b [ARM] 5004/1: Tosa: make several unreferenced structures static.
Now that scoop gpio's are converted to generic_gpio,
tosascoop_device and tosascoop_jc_device don't have
to be exported.

Also make tosa_gpio_* static

Signed-off-by: Dmitry Baryshkov <dbaryshkov@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-04-19 11:29:09 +01:00
Mark Brown
768dec4cc3 [ARM] 4976/1: zylonite: Configure GPIO for WM9713 IRQ line
Set up the IRQ line for the WM9713 device on the Zylonite.

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: eric miao <eric.y.miao@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-04-19 11:29:09 +01:00
Dmitry Baryshkov
311c736c19 [ARM] 4973/1: Tosa: use leds-gpio driver.
Now as the scoop pins are covered by the generic gpio API,
we can use leds-gpio driver instead of special leds-tosa.

Signed-off-by: Dmitry Baryshkov <dbaryshkov@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-04-19 11:29:08 +01:00
Dmitry Baryshkov
d4e7d09f7a [ARM] 4972/1: Tosa: convert scoop GPIOs usage to generic gpio code
Convert set/reset_scoop_gpio to generic gpio calls.
This patch depends on the pxaficp_ir hooks patch.

Signed-off-by: Dmitry Baryshkov <dbaryshkov@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-04-19 11:29:08 +01:00
Dmitry Baryshkov
baf1c5d2a0 [ARM] 4971/1: pxaficp_ir: provide startup and shutdown hooks
Let platform do some specific initialisation and cleanup
things during pxaficp_ir probing and removing. E.g. this
can be usefull to request/free gpios used by the platform
to control the transceiver.

Signed-off-by: Dmitry Baryshkov <dbaryshkov@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-04-19 11:29:08 +01:00
Mike Rapoport
64c1dd3bbf [ARM] 4959/1: PXA: Fix misprint in CICR1_RGBT_CONV
This patch fixes misprint in definition of CICR1_RGBT_CONV in include/asm-arm/arch-pxa/pxa-regs.h

Signed-off-by: Mike Rapoport <mike@compulab.co.il>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-04-19 11:29:07 +01:00
Philipp Zabel
e07ff8d809 [ARM] 4952/1: magician: add LCD detection, LCD power switching, update pxafb settings
All magician devices I've encountered so far have featured the Toppoly
TD028STEB1 display, so the Samsung LTP280QV support is untested.
The power-on sequence is not correct because pxafb doesn't yet support
enabling the LCD controller in the middle of the it.

Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-04-19 11:29:07 +01:00
Philipp Zabel
70e357f842 [ARM] 4948/1: magician: use htc-egpio to drive the GPIO/IRQ expander CPLD
needed for power management (audio, BT, charging, GSM, LCD, SD), GSM, flash and SD operation and audio routing.

Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-04-19 11:29:07 +01:00
Philipp Zabel
103a175489 [ARM] 4943/2: magician: fix magician.h GPIO header includes
PXA GPIO definitions were split from pxa-regs.h into pxa2xx-gpio.h.

Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-04-19 11:29:06 +01:00
Jaya Kumar
90b8fc3496 [ARM] 4867/1: Adds flash, udc, mci support for gumstix F boards
This patch implements support for Gumstix-F flash, udc and mci. Fixes since the last time are:
- Steve Sakoman as maintainer
- cleanup for udc and mci setup

Signed-off-by: Jaya Kumar <jayakumar.lkml@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-04-19 11:29:06 +01:00
eric miao
4354e18812 [ARM] pxa: remove keypad register definitions from pxa-regs.h
Keypad registers are now fully defined within pxa27x-keypad.c, no
need to keep those definitions in pxa-regs.h

Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-04-19 11:29:06 +01:00
eric miao
3732098041 [ARM] pxa: add pxa27x_keypad device and pxa_set_keypad_info()
also update the clk definitions in pxa27x and pxa3xx.

Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-04-19 11:29:05 +01:00
eric miao
c0a596d6a1 [ARM] pxa: allow dynamic enable/disable of GPIO wakeup for pxa{25x,27x}
Changes include:

1. rename MFP_LPM_WAKEUP_ENABLE into MFP_LPM_CAN_WAKEUP to indicate
   the board capability of this pin to wakeup the system

2. add gpio_set_wake() and keypad_set_wake() to allow dynamically
   enable/disable wakeup from GPIOs and keypad GPIO

   * these functions are currently kept in mfp-pxa2xx.c due to their
     dependency to the MFP configuration

3. pxa2xx_mfp_config() only gives early warning if MFP_LPM_CAN_WAKEUP
   is set on incorrect pins

So that the GPIO's wakeup capability is now decided by the following:

   a) processor's capability: (only those GPIOs which have dedicated
      bits within PWER/PRER/PFER can wakeup the system), this is
      initialized by pxa{25x,27x}_init_mfp()

   b) board design decides:
      - whether the pin is designed to wakeup the system (some of
        the GPIOs are configured as other functions, which is not
        intended to be a wakeup source), by OR'ing the pin config
        with MFP_LPM_CAN_WAKEUP

      - which edge the pin is designed to wakeup the system, this
        may depends on external peripherals/connections, which is
        totally board specific; this is indicated by MFP_LPM_EDGE_*

   c) the corresponding device's (most likely the gpio_keys.c) wakeup
      attribute:

Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-04-19 11:29:05 +01:00
eric miao
7facc2f937 [ARM] pxa: add MFP-alike pin configuration support for pxa{25x, 27x}
Pin configuration on pxa{25x,27x} has now separated from generic GPIO
into dedicated mfp-pxa2xx.c by this patch. The name "mfp" is borrowed
from pxa3xx and is used here to alert the difference between the two
concepts: pin configuration and generic GPIOs.  A GPIO can be called
a "GPIO" _only_ when the corresponding pin is configured so.

A pin configuration on pxa{25x,27x} is composed of:

    - alternate function selection (or pin mux as commonly called)
    - low power state or sleep state
    - wakeup enabling from low power mode

The following MFP_xxx bit definitions in mfp.h are re-used:

    - MFP_PIN(x)
    - MFP_AFx
    - MFP_LPM_DRIVE_{LOW, HIGH}
    - MFP_LPM_EDGE_*

Selecting alternate function on pxa{25x, 27x} involves configuration
of GPIO direction register GPDRx, so a new bit and MFP_DIR_{IN, OUT}
are introduced. And pin configurations are defined by the following
two macros:

    - MFP_CFG_IN  : for input alternate functions
    - MFP_CFG_OUT : for output alternate functions

Every configuration should provide a low power state if it configured
as output using MFP_CFG_OUT().  As a general guideline, the low power
state should be decided to minimize the overall power dissipation. As
an example, it is better to drive the pin as high level in low power
mode if the GPIO is configured as an active low chip select.

Pins configured as GPIO are defined by MFP_CFG_IN(). This is to avoid
side effects when it is firstly configured as output.  The actual
direction of the GPIO is configured by gpio_direction_{input, output}

Wakeup enabling on pxa{25x, 27x} is actually GPIO based wakeup, thus
the device based enable_irq_wake() mechanism is not applicable here.

E.g.  invoking enable_irq_wake() with a GPIO IRQ as in the following
code to enable OTG wakeup is by no means portable and intuitive, and
it is valid _only_ when GPIO35 is configured as USB_P2_1:

    enable_irq_wake( gpio_to_irq(35) );

To make things worse, not every GPIO is able to wakeup the system.
Only a small number of them can, on either rising or falling edge,
or when level is high (for keypad GPIOs).

Thus, another new bit is introduced to indicate that the GPIO will
wakeup the system:

    - MFP_LPM_WAKEUP_ENABLE

The following macros can be used in platform code, and be OR'ed to
the GPIO configuration to enable its wakeup:

    - WAKEUP_ON_EDGE_{RISE, FALL, BOTH}
    - WAKEUP_ON_LEVEL_HIGH

The WAKEUP_ON_LEVEL_HIGH is used for keypad GPIOs _only_, there is
no edge settings for those GPIOs.

These WAKEUP_ON_* flags OR'ed on wrong GPIOs will be ignored in case
that platform code author is careless enough.

The tradeoff here is that the wakeup source is fully determined by
the platform configuration, instead of enable_irq_wake().

Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-04-19 11:29:04 +01:00
eric miao
a683b14df8 [ARM] pxa: separate GPIOs and their mode definitions to pxa2xx-gpio.h
two reasons:
1. GPIO namings and their mode definitions are conceptually not part
   of the PXA register definitions

2. this is actually a temporary move in the transition of PXA2xx to
   use MFP-alike APIs (as what PXA3xx is now doing), so that legacy
   code will still work and new code can be added in step by step

Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-04-19 11:29:04 +01:00
eric miao
f6fb7af476 [ARM] pxa: integrate low IRQ chip (ICIP) and high IRQ chip (ICIP2) into one
This makes the code better organized and simplified a bit.  The change
will lose a bit of performance when performing IRQ ack/mask/unmask,but
that's not too much after checking the result binary.

This patch also removes the ugly #ifdef CONFIG_PXA27x .. #endif by
carefully not to access those pxa{27x,3xx} specific registers, this
is done by keeping an internal IRQ number variable.  The pxa-regs.h
is also modified so registers for IRQ > PXA_IRQ(31) are made public
even if CONFIG_PXA{27x,3xx} isn't defined (for pxa25x's sake)

The incorrect assumption in the original code that internal irq starts
from 0 is also corrected by comparing with PXA_IRQ(0).

"struct sys_device" for the IRQ are reduced into one single device on
pxa{27x,3xx}.

Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-04-19 11:29:04 +01:00
Robert Jarzmik
d72b1370b0 [ARM] 4868/1: Enhance pxa270 GPIO definitions
Enhanced GPIO alternate functions descriptions,
taken from Intel PXA270 Developers Manual.

Signed-off-by: Robert Jarzmik <rjarzmik@free.fr>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-04-19 11:29:03 +01:00
Mark Brown
dcc88a170c [ARM] 4830/1: Add support for the CLK_POUT pin on PXA3xx CPUs
Expose control of the PXA3xx 13MHz CLK_POUT pin via the clock API

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-04-19 11:29:02 +01:00
Uwe Kleine-König
cbfc0f0406 [ARM] 4852/1: Add timerfd_create, timerfd_settime and timerfd_gettime syscall entries
Signed-off-by: Uwe Kleine-König <Uwe.Kleine-Koenig@digi.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-04-19 11:28:06 +01:00
Catalin Marinas
14a6acc23f RealView: Add uncompressing support for PB1176
This patch adds the UART0 base address detection in uncompress.h.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2008-04-18 22:43:16 +01:00
Bahadir Balban
a0316b244e RealView: Base support for the PB1176 platform
This patch adds the base files for the PB1176 platform support.

Signed-off-by: Bahadir Balban <bahadir.balban@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2008-04-18 22:43:15 +01:00