Ralph Campbell 210d6ca3db IB/ipath: Performance optimization for CPU differences ... Different processors have different ordering restrictions for write combining. By taking advantage of this, we can eliminate some write barriers when writing to the send buffers. Signed-off-by: Ralph Campbell <ralph.campbell@qlogic.com> Signed-off-by: Roland Dreier <rolandd@cisco.com>		2007-10-09 20:04:14 -07:00
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amso1100	RDMA/amso1100: Initialize the wait_queue_head_t in the c2_qp structure	2007-07-28 08:06:40 -07:00
cxgb3	RDMA/cxgb3: Make the iw_cxgb3 module parameters writable	2007-10-09 19:59:04 -07:00
ehca	IB/ehca: Fix clipping of device limits to INT_MAX	2007-10-09 19:59:18 -07:00
ipath	IB/ipath: Performance optimization for CPU differences	2007-10-09 20:04:14 -07:00
mlx4	IB/mlx4: Implement FMRs	2007-10-09 19:59:16 -07:00
mthca	IB/mthca: Use mmiowb() to avoid firmware commands getting jumbled up	2007-10-09 19:59:17 -07:00