3d0d14f983
lindent these files:
errors lines of code errors/KLOC
arch/x86/math-emu/ 2236 9424 237.2
arch/x86/math-emu/ 128 8706 14.7
no other changes. No code changed:
text data bss dec hex filename
5589802 612739 3833856 10036397 9924ad vmlinux.before
5589802 612739 3833856 10036397 9924ad vmlinux.after
the intent of this patch is to ease the automated tracking of kernel
code quality - it's just much easier for us to maintain it if every file
in arch/x86 is supposed to be clean.
NOTE: it is a known problem of lindent that it causes some style damage
of its own, but it's a safe tool (well, except for the gcc array range
initializers extension), so we did the bulk of the changes via lindent,
and did the manual fixups in a followup patch.
the resulting math-emu code has been tested by Thomas Gleixner on a real
386 DX CPU as well, and it works fine.
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
690 lines
18 KiB
C
690 lines
18 KiB
C
/*---------------------------------------------------------------------------+
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| errors.c |
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| |
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| The error handling functions for wm-FPU-emu |
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| |
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| Copyright (C) 1992,1993,1994,1996 |
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| W. Metzenthen, 22 Parker St, Ormond, Vic 3163, Australia |
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| E-mail billm@jacobi.maths.monash.edu.au |
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+---------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------+
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| Note: |
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| The file contains code which accesses user memory. |
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| Emulator static data may change when user memory is accessed, due to |
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| other processes using the emulator while swapping is in progress. |
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+---------------------------------------------------------------------------*/
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#include <linux/signal.h>
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#include <asm/uaccess.h>
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#include "fpu_emu.h"
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#include "fpu_system.h"
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#include "exception.h"
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#include "status_w.h"
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#include "control_w.h"
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#include "reg_constant.h"
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#include "version.h"
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/* */
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#undef PRINT_MESSAGES
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/* */
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#if 0
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void Un_impl(void)
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{
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u_char byte1, FPU_modrm;
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unsigned long address = FPU_ORIG_EIP;
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RE_ENTRANT_CHECK_OFF;
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/* No need to check access_ok(), we have previously fetched these bytes. */
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printk("Unimplemented FPU Opcode at eip=%p : ", (void __user *)address);
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if (FPU_CS == __USER_CS) {
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while (1) {
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FPU_get_user(byte1, (u_char __user *) address);
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if ((byte1 & 0xf8) == 0xd8)
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break;
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printk("[%02x]", byte1);
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address++;
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}
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printk("%02x ", byte1);
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FPU_get_user(FPU_modrm, 1 + (u_char __user *) address);
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if (FPU_modrm >= 0300)
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printk("%02x (%02x+%d)\n", FPU_modrm, FPU_modrm & 0xf8,
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FPU_modrm & 7);
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else
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printk("/%d\n", (FPU_modrm >> 3) & 7);
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} else {
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printk("cs selector = %04x\n", FPU_CS);
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}
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RE_ENTRANT_CHECK_ON;
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EXCEPTION(EX_Invalid);
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}
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#endif /* 0 */
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/*
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Called for opcodes which are illegal and which are known to result in a
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SIGILL with a real 80486.
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*/
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void FPU_illegal(void)
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{
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math_abort(FPU_info, SIGILL);
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}
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void FPU_printall(void)
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{
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int i;
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static const char *tag_desc[] = { "Valid", "Zero", "ERROR", "Empty",
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"DeNorm", "Inf", "NaN"
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};
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u_char byte1, FPU_modrm;
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unsigned long address = FPU_ORIG_EIP;
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RE_ENTRANT_CHECK_OFF;
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/* No need to check access_ok(), we have previously fetched these bytes. */
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printk("At %p:", (void *)address);
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if (FPU_CS == __USER_CS) {
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#define MAX_PRINTED_BYTES 20
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for (i = 0; i < MAX_PRINTED_BYTES; i++) {
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FPU_get_user(byte1, (u_char __user *) address);
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if ((byte1 & 0xf8) == 0xd8) {
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printk(" %02x", byte1);
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break;
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}
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printk(" [%02x]", byte1);
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address++;
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}
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if (i == MAX_PRINTED_BYTES)
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printk(" [more..]\n");
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else {
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FPU_get_user(FPU_modrm, 1 + (u_char __user *) address);
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if (FPU_modrm >= 0300)
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printk(" %02x (%02x+%d)\n", FPU_modrm,
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FPU_modrm & 0xf8, FPU_modrm & 7);
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else
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printk(" /%d, mod=%d rm=%d\n",
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(FPU_modrm >> 3) & 7,
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(FPU_modrm >> 6) & 3, FPU_modrm & 7);
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}
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} else {
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printk("%04x\n", FPU_CS);
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}
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partial_status = status_word();
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#ifdef DEBUGGING
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if (partial_status & SW_Backward)
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printk("SW: backward compatibility\n");
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if (partial_status & SW_C3)
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printk("SW: condition bit 3\n");
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if (partial_status & SW_C2)
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printk("SW: condition bit 2\n");
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if (partial_status & SW_C1)
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printk("SW: condition bit 1\n");
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if (partial_status & SW_C0)
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printk("SW: condition bit 0\n");
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if (partial_status & SW_Summary)
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printk("SW: exception summary\n");
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if (partial_status & SW_Stack_Fault)
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printk("SW: stack fault\n");
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if (partial_status & SW_Precision)
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printk("SW: loss of precision\n");
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if (partial_status & SW_Underflow)
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printk("SW: underflow\n");
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if (partial_status & SW_Overflow)
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printk("SW: overflow\n");
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if (partial_status & SW_Zero_Div)
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printk("SW: divide by zero\n");
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if (partial_status & SW_Denorm_Op)
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printk("SW: denormalized operand\n");
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if (partial_status & SW_Invalid)
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printk("SW: invalid operation\n");
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#endif /* DEBUGGING */
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printk(" SW: b=%d st=%ld es=%d sf=%d cc=%d%d%d%d ef=%d%d%d%d%d%d\n", partial_status & 0x8000 ? 1 : 0, /* busy */
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(partial_status & 0x3800) >> 11, /* stack top pointer */
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partial_status & 0x80 ? 1 : 0, /* Error summary status */
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partial_status & 0x40 ? 1 : 0, /* Stack flag */
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partial_status & SW_C3 ? 1 : 0, partial_status & SW_C2 ? 1 : 0, /* cc */
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partial_status & SW_C1 ? 1 : 0, partial_status & SW_C0 ? 1 : 0, /* cc */
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partial_status & SW_Precision ? 1 : 0,
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partial_status & SW_Underflow ? 1 : 0,
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partial_status & SW_Overflow ? 1 : 0,
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partial_status & SW_Zero_Div ? 1 : 0,
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partial_status & SW_Denorm_Op ? 1 : 0,
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partial_status & SW_Invalid ? 1 : 0);
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printk(" CW: ic=%d rc=%ld%ld pc=%ld%ld iem=%d ef=%d%d%d%d%d%d\n",
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control_word & 0x1000 ? 1 : 0,
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(control_word & 0x800) >> 11, (control_word & 0x400) >> 10,
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(control_word & 0x200) >> 9, (control_word & 0x100) >> 8,
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control_word & 0x80 ? 1 : 0,
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control_word & SW_Precision ? 1 : 0,
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control_word & SW_Underflow ? 1 : 0,
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control_word & SW_Overflow ? 1 : 0,
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control_word & SW_Zero_Div ? 1 : 0,
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control_word & SW_Denorm_Op ? 1 : 0,
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control_word & SW_Invalid ? 1 : 0);
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for (i = 0; i < 8; i++) {
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FPU_REG *r = &st(i);
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u_char tagi = FPU_gettagi(i);
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switch (tagi) {
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case TAG_Empty:
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continue;
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break;
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case TAG_Zero:
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case TAG_Special:
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tagi = FPU_Special(r);
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case TAG_Valid:
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printk("st(%d) %c .%04lx %04lx %04lx %04lx e%+-6d ", i,
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getsign(r) ? '-' : '+',
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(long)(r->sigh >> 16),
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(long)(r->sigh & 0xFFFF),
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(long)(r->sigl >> 16),
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(long)(r->sigl & 0xFFFF),
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exponent(r) - EXP_BIAS + 1);
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break;
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default:
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printk("Whoops! Error in errors.c: tag%d is %d ", i,
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tagi);
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continue;
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break;
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}
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printk("%s\n", tag_desc[(int)(unsigned)tagi]);
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}
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RE_ENTRANT_CHECK_ON;
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}
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static struct {
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int type;
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const char *name;
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} exception_names[] = {
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{
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EX_StackOver, "stack overflow"}, {
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EX_StackUnder, "stack underflow"}, {
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EX_Precision, "loss of precision"}, {
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EX_Underflow, "underflow"}, {
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EX_Overflow, "overflow"}, {
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EX_ZeroDiv, "divide by zero"}, {
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EX_Denormal, "denormalized operand"}, {
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EX_Invalid, "invalid operation"}, {
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EX_INTERNAL, "INTERNAL BUG in " FPU_VERSION}, {
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0, NULL}
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};
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/*
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EX_INTERNAL is always given with a code which indicates where the
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error was detected.
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Internal error types:
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0x14 in fpu_etc.c
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0x1nn in a *.c file:
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0x101 in reg_add_sub.c
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0x102 in reg_mul.c
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0x104 in poly_atan.c
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0x105 in reg_mul.c
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0x107 in fpu_trig.c
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0x108 in reg_compare.c
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0x109 in reg_compare.c
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0x110 in reg_add_sub.c
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0x111 in fpe_entry.c
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0x112 in fpu_trig.c
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0x113 in errors.c
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0x115 in fpu_trig.c
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0x116 in fpu_trig.c
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0x117 in fpu_trig.c
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0x118 in fpu_trig.c
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0x119 in fpu_trig.c
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0x120 in poly_atan.c
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0x121 in reg_compare.c
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0x122 in reg_compare.c
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0x123 in reg_compare.c
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0x125 in fpu_trig.c
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0x126 in fpu_entry.c
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0x127 in poly_2xm1.c
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0x128 in fpu_entry.c
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0x129 in fpu_entry.c
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0x130 in get_address.c
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0x131 in get_address.c
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0x132 in get_address.c
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0x133 in get_address.c
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0x140 in load_store.c
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0x141 in load_store.c
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0x150 in poly_sin.c
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0x151 in poly_sin.c
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0x160 in reg_ld_str.c
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0x161 in reg_ld_str.c
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0x162 in reg_ld_str.c
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0x163 in reg_ld_str.c
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0x164 in reg_ld_str.c
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0x170 in fpu_tags.c
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0x171 in fpu_tags.c
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0x172 in fpu_tags.c
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0x180 in reg_convert.c
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0x2nn in an *.S file:
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0x201 in reg_u_add.S
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0x202 in reg_u_div.S
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0x203 in reg_u_div.S
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0x204 in reg_u_div.S
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0x205 in reg_u_mul.S
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0x206 in reg_u_sub.S
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0x207 in wm_sqrt.S
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0x208 in reg_div.S
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0x209 in reg_u_sub.S
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0x210 in reg_u_sub.S
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0x211 in reg_u_sub.S
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0x212 in reg_u_sub.S
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0x213 in wm_sqrt.S
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0x214 in wm_sqrt.S
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0x215 in wm_sqrt.S
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0x220 in reg_norm.S
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0x221 in reg_norm.S
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0x230 in reg_round.S
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0x231 in reg_round.S
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0x232 in reg_round.S
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0x233 in reg_round.S
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0x234 in reg_round.S
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0x235 in reg_round.S
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0x236 in reg_round.S
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0x240 in div_Xsig.S
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0x241 in div_Xsig.S
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0x242 in div_Xsig.S
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*/
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asmlinkage void FPU_exception(int n)
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{
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int i, int_type;
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int_type = 0; /* Needed only to stop compiler warnings */
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if (n & EX_INTERNAL) {
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int_type = n - EX_INTERNAL;
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n = EX_INTERNAL;
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/* Set lots of exception bits! */
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partial_status |= (SW_Exc_Mask | SW_Summary | SW_Backward);
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} else {
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/* Extract only the bits which we use to set the status word */
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n &= (SW_Exc_Mask);
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/* Set the corresponding exception bit */
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partial_status |= n;
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/* Set summary bits iff exception isn't masked */
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if (partial_status & ~control_word & CW_Exceptions)
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partial_status |= (SW_Summary | SW_Backward);
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if (n & (SW_Stack_Fault | EX_Precision)) {
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if (!(n & SW_C1))
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/* This bit distinguishes over- from underflow for a stack fault,
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and roundup from round-down for precision loss. */
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partial_status &= ~SW_C1;
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}
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}
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RE_ENTRANT_CHECK_OFF;
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if ((~control_word & n & CW_Exceptions) || (n == EX_INTERNAL)) {
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#ifdef PRINT_MESSAGES
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/* My message from the sponsor */
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printk(FPU_VERSION " " __DATE__ " (C) W. Metzenthen.\n");
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#endif /* PRINT_MESSAGES */
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/* Get a name string for error reporting */
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for (i = 0; exception_names[i].type; i++)
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if ((exception_names[i].type & n) ==
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exception_names[i].type)
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break;
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if (exception_names[i].type) {
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#ifdef PRINT_MESSAGES
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printk("FP Exception: %s!\n", exception_names[i].name);
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#endif /* PRINT_MESSAGES */
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} else
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printk("FPU emulator: Unknown Exception: 0x%04x!\n", n);
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if (n == EX_INTERNAL) {
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printk("FPU emulator: Internal error type 0x%04x\n",
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int_type);
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FPU_printall();
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}
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#ifdef PRINT_MESSAGES
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else
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FPU_printall();
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#endif /* PRINT_MESSAGES */
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/*
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* The 80486 generates an interrupt on the next non-control FPU
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* instruction. So we need some means of flagging it.
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* We use the ES (Error Summary) bit for this.
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*/
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}
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RE_ENTRANT_CHECK_ON;
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#ifdef __DEBUG__
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math_abort(FPU_info, SIGFPE);
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#endif /* __DEBUG__ */
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}
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/* Real operation attempted on a NaN. */
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/* Returns < 0 if the exception is unmasked */
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int real_1op_NaN(FPU_REG * a)
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{
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int signalling, isNaN;
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isNaN = (exponent(a) == EXP_OVER) && (a->sigh & 0x80000000);
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/* The default result for the case of two "equal" NaNs (signs may
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differ) is chosen to reproduce 80486 behaviour */
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signalling = isNaN && !(a->sigh & 0x40000000);
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if (!signalling) {
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if (!isNaN) { /* pseudo-NaN, or other unsupported? */
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if (control_word & CW_Invalid) {
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/* Masked response */
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reg_copy(&CONST_QNaN, a);
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}
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EXCEPTION(EX_Invalid);
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return (!(control_word & CW_Invalid) ? FPU_Exception :
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0) | TAG_Special;
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}
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return TAG_Special;
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}
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if (control_word & CW_Invalid) {
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/* The masked response */
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if (!(a->sigh & 0x80000000)) { /* pseudo-NaN ? */
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reg_copy(&CONST_QNaN, a);
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}
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/* ensure a Quiet NaN */
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a->sigh |= 0x40000000;
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}
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EXCEPTION(EX_Invalid);
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return (!(control_word & CW_Invalid) ? FPU_Exception : 0) | TAG_Special;
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}
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/* Real operation attempted on two operands, one a NaN. */
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/* Returns < 0 if the exception is unmasked */
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int real_2op_NaN(FPU_REG const *b, u_char tagb,
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int deststnr, FPU_REG const *defaultNaN)
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{
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FPU_REG *dest = &st(deststnr);
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FPU_REG const *a = dest;
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u_char taga = FPU_gettagi(deststnr);
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FPU_REG const *x;
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int signalling, unsupported;
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if (taga == TAG_Special)
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taga = FPU_Special(a);
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if (tagb == TAG_Special)
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tagb = FPU_Special(b);
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/* TW_NaN is also used for unsupported data types. */
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unsupported = ((taga == TW_NaN)
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&& !((exponent(a) == EXP_OVER)
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&& (a->sigh & 0x80000000)))
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|| ((tagb == TW_NaN)
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&& !((exponent(b) == EXP_OVER) && (b->sigh & 0x80000000)));
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if (unsupported) {
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if (control_word & CW_Invalid) {
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/* Masked response */
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FPU_copy_to_regi(&CONST_QNaN, TAG_Special, deststnr);
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}
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EXCEPTION(EX_Invalid);
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return (!(control_word & CW_Invalid) ? FPU_Exception : 0) |
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TAG_Special;
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}
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if (taga == TW_NaN) {
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x = a;
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if (tagb == TW_NaN) {
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signalling = !(a->sigh & b->sigh & 0x40000000);
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if (significand(b) > significand(a))
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x = b;
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else if (significand(b) == significand(a)) {
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/* The default result for the case of two "equal" NaNs (signs may
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differ) is chosen to reproduce 80486 behaviour */
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x = defaultNaN;
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}
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} else {
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/* return the quiet version of the NaN in a */
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signalling = !(a->sigh & 0x40000000);
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}
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} else
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#ifdef PARANOID
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if (tagb == TW_NaN)
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#endif /* PARANOID */
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{
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signalling = !(b->sigh & 0x40000000);
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x = b;
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}
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#ifdef PARANOID
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else {
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signalling = 0;
|
|
EXCEPTION(EX_INTERNAL | 0x113);
|
|
x = &CONST_QNaN;
|
|
}
|
|
#endif /* PARANOID */
|
|
|
|
if ((!signalling) || (control_word & CW_Invalid)) {
|
|
if (!x)
|
|
x = b;
|
|
|
|
if (!(x->sigh & 0x80000000)) /* pseudo-NaN ? */
|
|
x = &CONST_QNaN;
|
|
|
|
FPU_copy_to_regi(x, TAG_Special, deststnr);
|
|
|
|
if (!signalling)
|
|
return TAG_Special;
|
|
|
|
/* ensure a Quiet NaN */
|
|
dest->sigh |= 0x40000000;
|
|
}
|
|
|
|
EXCEPTION(EX_Invalid);
|
|
|
|
return (!(control_word & CW_Invalid) ? FPU_Exception : 0) | TAG_Special;
|
|
}
|
|
|
|
/* Invalid arith operation on Valid registers */
|
|
/* Returns < 0 if the exception is unmasked */
|
|
asmlinkage int arith_invalid(int deststnr)
|
|
{
|
|
|
|
EXCEPTION(EX_Invalid);
|
|
|
|
if (control_word & CW_Invalid) {
|
|
/* The masked response */
|
|
FPU_copy_to_regi(&CONST_QNaN, TAG_Special, deststnr);
|
|
}
|
|
|
|
return (!(control_word & CW_Invalid) ? FPU_Exception : 0) | TAG_Valid;
|
|
|
|
}
|
|
|
|
/* Divide a finite number by zero */
|
|
asmlinkage int FPU_divide_by_zero(int deststnr, u_char sign)
|
|
{
|
|
FPU_REG *dest = &st(deststnr);
|
|
int tag = TAG_Valid;
|
|
|
|
if (control_word & CW_ZeroDiv) {
|
|
/* The masked response */
|
|
FPU_copy_to_regi(&CONST_INF, TAG_Special, deststnr);
|
|
setsign(dest, sign);
|
|
tag = TAG_Special;
|
|
}
|
|
|
|
EXCEPTION(EX_ZeroDiv);
|
|
|
|
return (!(control_word & CW_ZeroDiv) ? FPU_Exception : 0) | tag;
|
|
|
|
}
|
|
|
|
/* This may be called often, so keep it lean */
|
|
int set_precision_flag(int flags)
|
|
{
|
|
if (control_word & CW_Precision) {
|
|
partial_status &= ~(SW_C1 & flags);
|
|
partial_status |= flags; /* The masked response */
|
|
return 0;
|
|
} else {
|
|
EXCEPTION(flags);
|
|
return 1;
|
|
}
|
|
}
|
|
|
|
/* This may be called often, so keep it lean */
|
|
asmlinkage void set_precision_flag_up(void)
|
|
{
|
|
if (control_word & CW_Precision)
|
|
partial_status |= (SW_Precision | SW_C1); /* The masked response */
|
|
else
|
|
EXCEPTION(EX_Precision | SW_C1);
|
|
}
|
|
|
|
/* This may be called often, so keep it lean */
|
|
asmlinkage void set_precision_flag_down(void)
|
|
{
|
|
if (control_word & CW_Precision) { /* The masked response */
|
|
partial_status &= ~SW_C1;
|
|
partial_status |= SW_Precision;
|
|
} else
|
|
EXCEPTION(EX_Precision);
|
|
}
|
|
|
|
asmlinkage int denormal_operand(void)
|
|
{
|
|
if (control_word & CW_Denormal) { /* The masked response */
|
|
partial_status |= SW_Denorm_Op;
|
|
return TAG_Special;
|
|
} else {
|
|
EXCEPTION(EX_Denormal);
|
|
return TAG_Special | FPU_Exception;
|
|
}
|
|
}
|
|
|
|
asmlinkage int arith_overflow(FPU_REG * dest)
|
|
{
|
|
int tag = TAG_Valid;
|
|
|
|
if (control_word & CW_Overflow) {
|
|
/* The masked response */
|
|
/* ###### The response here depends upon the rounding mode */
|
|
reg_copy(&CONST_INF, dest);
|
|
tag = TAG_Special;
|
|
} else {
|
|
/* Subtract the magic number from the exponent */
|
|
addexponent(dest, (-3 * (1 << 13)));
|
|
}
|
|
|
|
EXCEPTION(EX_Overflow);
|
|
if (control_word & CW_Overflow) {
|
|
/* The overflow exception is masked. */
|
|
/* By definition, precision is lost.
|
|
The roundup bit (C1) is also set because we have
|
|
"rounded" upwards to Infinity. */
|
|
EXCEPTION(EX_Precision | SW_C1);
|
|
return tag;
|
|
}
|
|
|
|
return tag;
|
|
|
|
}
|
|
|
|
asmlinkage int arith_underflow(FPU_REG * dest)
|
|
{
|
|
int tag = TAG_Valid;
|
|
|
|
if (control_word & CW_Underflow) {
|
|
/* The masked response */
|
|
if (exponent16(dest) <= EXP_UNDER - 63) {
|
|
reg_copy(&CONST_Z, dest);
|
|
partial_status &= ~SW_C1; /* Round down. */
|
|
tag = TAG_Zero;
|
|
} else {
|
|
stdexp(dest);
|
|
}
|
|
} else {
|
|
/* Add the magic number to the exponent. */
|
|
addexponent(dest, (3 * (1 << 13)) + EXTENDED_Ebias);
|
|
}
|
|
|
|
EXCEPTION(EX_Underflow);
|
|
if (control_word & CW_Underflow) {
|
|
/* The underflow exception is masked. */
|
|
EXCEPTION(EX_Precision);
|
|
return tag;
|
|
}
|
|
|
|
return tag;
|
|
|
|
}
|
|
|
|
void FPU_stack_overflow(void)
|
|
{
|
|
|
|
if (control_word & CW_Invalid) {
|
|
/* The masked response */
|
|
top--;
|
|
FPU_copy_to_reg0(&CONST_QNaN, TAG_Special);
|
|
}
|
|
|
|
EXCEPTION(EX_StackOver);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
void FPU_stack_underflow(void)
|
|
{
|
|
|
|
if (control_word & CW_Invalid) {
|
|
/* The masked response */
|
|
FPU_copy_to_reg0(&CONST_QNaN, TAG_Special);
|
|
}
|
|
|
|
EXCEPTION(EX_StackUnder);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
void FPU_stack_underflow_i(int i)
|
|
{
|
|
|
|
if (control_word & CW_Invalid) {
|
|
/* The masked response */
|
|
FPU_copy_to_regi(&CONST_QNaN, TAG_Special, i);
|
|
}
|
|
|
|
EXCEPTION(EX_StackUnder);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
void FPU_stack_underflow_pop(int i)
|
|
{
|
|
|
|
if (control_word & CW_Invalid) {
|
|
/* The masked response */
|
|
FPU_copy_to_regi(&CONST_QNaN, TAG_Special, i);
|
|
FPU_pop();
|
|
}
|
|
|
|
EXCEPTION(EX_StackUnder);
|
|
|
|
return;
|
|
|
|
}
|