66a740572d
Currently the INTC2 code contains a fixed IRQ table that it iterates through to set the handler type, we move this in to the CPU subtype setup code instead and allow for submitting the table that way. This drops the ST40 tables, as nothing has been happening with those processors, while converting the only existing users to use the new table directly (SH7760 and SH7780). Signed-off-by: Paul Mundt <lethal@linux-sh.org>
107 lines
2.6 KiB
C
107 lines
2.6 KiB
C
/*
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* SH7780 Setup
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*
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* Copyright (C) 2006 Paul Mundt
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/platform_device.h>
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#include <linux/init.h>
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#include <linux/serial.h>
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#include <asm/sci.h>
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static struct resource rtc_resources[] = {
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[0] = {
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.start = 0xffe80000,
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.end = 0xffe80000 + 0x58 - 1,
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.flags = IORESOURCE_IO,
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},
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[1] = {
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/* Period IRQ */
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.start = 21,
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.flags = IORESOURCE_IRQ,
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},
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[2] = {
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/* Carry IRQ */
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.start = 22,
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.flags = IORESOURCE_IRQ,
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},
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[3] = {
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/* Alarm IRQ */
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.start = 23,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device rtc_device = {
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.name = "sh-rtc",
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.id = -1,
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.num_resources = ARRAY_SIZE(rtc_resources),
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.resource = rtc_resources,
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};
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static struct plat_sci_port sci_platform_data[] = {
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{
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.mapbase = 0xffe00000,
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.flags = UPF_BOOT_AUTOCONF,
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.type = PORT_SCIF,
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.irqs = { 40, 41, 43, 42 },
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}, {
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.mapbase = 0xffe10000,
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.flags = UPF_BOOT_AUTOCONF,
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.type = PORT_SCIF,
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.irqs = { 76, 77, 79, 78 },
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}, {
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.flags = 0,
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}
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};
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static struct platform_device sci_device = {
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.name = "sh-sci",
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.id = -1,
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.dev = {
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.platform_data = sci_platform_data,
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},
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};
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static struct platform_device *sh7780_devices[] __initdata = {
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&rtc_device,
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&sci_device,
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};
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static int __init sh7780_devices_setup(void)
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{
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return platform_add_devices(sh7780_devices,
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ARRAY_SIZE(sh7780_devices));
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}
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__initcall(sh7780_devices_setup);
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static struct intc2_data intc2_irq_table[] = {
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{ TIMER_IRQ, 0, 24, 0, INTC_TMU0_MSK, 2 },
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{ 21, 1, 0, 0, INTC_RTC_MSK, TIMER_PRIORITY },
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{ 22, 1, 1, 0, INTC_RTC_MSK, TIMER_PRIORITY },
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{ 23, 1, 2, 0, INTC_RTC_MSK, TIMER_PRIORITY },
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{ SCIF0_ERI_IRQ, 8, 24, 0, INTC_SCIF0_MSK, SCIF0_PRIORITY },
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{ SCIF0_RXI_IRQ, 8, 24, 0, INTC_SCIF0_MSK, SCIF0_PRIORITY },
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{ SCIF0_BRI_IRQ, 8, 24, 0, INTC_SCIF0_MSK, SCIF0_PRIORITY },
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{ SCIF0_TXI_IRQ, 8, 24, 0, INTC_SCIF0_MSK, SCIF0_PRIORITY },
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{ SCIF1_ERI_IRQ, 8, 16, 0, INTC_SCIF1_MSK, SCIF1_PRIORITY },
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{ SCIF1_RXI_IRQ, 8, 16, 0, INTC_SCIF1_MSK, SCIF1_PRIORITY },
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{ SCIF1_BRI_IRQ, 8, 16, 0, INTC_SCIF1_MSK, SCIF1_PRIORITY },
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{ SCIF1_TXI_IRQ, 8, 16, 0, INTC_SCIF1_MSK, SCIF1_PRIORITY },
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{ PCIC0_IRQ, 0x10, 8, 0, INTC_PCIC0_MSK, PCIC0_PRIORITY },
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{ PCIC1_IRQ, 0x10, 0, 0, INTC_PCIC1_MSK, PCIC1_PRIORITY },
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{ PCIC2_IRQ, 0x14, 24, 0, INTC_PCIC2_MSK, PCIC2_PRIORITY },
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{ PCIC3_IRQ, 0x14, 16, 0, INTC_PCIC3_MSK, PCIC3_PRIORITY },
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{ PCIC4_IRQ, 0x14, 8, 0, INTC_PCIC4_MSK, PCIC4_PRIORITY },
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};
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void __init init_IRQ_intc2(void)
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{
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make_intc2_irq(intc2_irq_table, ARRAY_SIZE(intc2_irq_table));
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}
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