c87abd75b3
Cleanup jmr3927, tx4927 and tx4938 irq codes, using common IRQ_CPU, I8259 and IRQ_TXX9 irq routines. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
58 lines
2.1 KiB
C
58 lines
2.1 KiB
C
/*
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* Author: MontaVista Software, Inc.
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* source@mvista.com
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*
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* Copyright 2001-2002 MontaVista Software Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
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* TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
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* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#ifndef __ASM_TX4927_TOSHIBA_RBTX4927_H
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#define __ASM_TX4927_TOSHIBA_RBTX4927_H
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#include <asm/tx4927/tx4927.h>
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#include <asm/tx4927/tx4927_mips.h>
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#ifdef CONFIG_PCI
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#include <asm/tx4927/tx4927_pci.h>
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#endif
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#define TOSHIBA_RBTX4927_WR08(a,b) do { TX4927_WR08(a,b); wbflush(); } while ( 0 )
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#ifdef CONFIG_PCI
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#define TBTX4927_ISA_IO_OFFSET TX4927_PCIIO
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#else
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#define TBTX4927_ISA_IO_OFFSET 0
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#endif
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#define RBTX4927_SW_RESET_DO 0xbc00f000
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#define RBTX4927_SW_RESET_DO_SET 0x01
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#define RBTX4927_SW_RESET_ENABLE 0xbc00f002
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#define RBTX4927_SW_RESET_ENABLE_SET 0x01
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#define RBTX4927_RTL_8019_BASE (0x1c020280-TBTX4927_ISA_IO_OFFSET)
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#define RBTX4927_RTL_8019_IRQ (TX4927_IRQ_PIC_BEG + 5)
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int toshiba_rbtx4927_irq_nested(int sw_irq);
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#endif /* __ASM_TX4927_TOSHIBA_RBTX4927_H */
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