a15da8eff3
The Uartlite data sheet defines the registers as 32 bit wide. This patch changes the register access to use 32 bit transfers and eliminates the magic +3 offset which is currently required to make the device work. Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: John Williams <jwilliams@itee.uq.edu.au> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
246 lines
5.4 KiB
C
246 lines
5.4 KiB
C
/*
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* Virtex hard ppc405 core common device listing
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*
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* Copyright 2005-2007 Secret Lab Technologies Ltd.
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* Copyright 2005 Freescale Semiconductor Inc.
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* Copyright 2002-2004 MontaVista Software, Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/device.h>
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#include <linux/serial_8250.h>
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#include <syslib/virtex_devices.h>
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#include <platforms/4xx/xparameters/xparameters.h>
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#include <asm/io.h>
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/*
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* UARTLITE: shortcut macro for single instance
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*/
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#define XPAR_UARTLITE(num) { \
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.name = "uartlite", \
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.id = num, \
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.num_resources = 2, \
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.resource = (struct resource[]) { \
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{ \
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.start = XPAR_UARTLITE_##num##_BASEADDR, \
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.end = XPAR_UARTLITE_##num##_HIGHADDR, \
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.flags = IORESOURCE_MEM, \
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}, \
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{ \
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.start = XPAR_INTC_0_UARTLITE_##num##_VEC_ID, \
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.flags = IORESOURCE_IRQ, \
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}, \
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}, \
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}
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/*
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* Full UART: shortcut macro for single instance + platform data structure
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*/
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#define XPAR_UART(num) { \
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.mapbase = XPAR_UARTNS550_##num##_BASEADDR + 3, \
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.irq = XPAR_INTC_0_UARTNS550_##num##_VEC_ID, \
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.iotype = UPIO_MEM, \
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.uartclk = XPAR_UARTNS550_##num##_CLOCK_FREQ_HZ, \
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.flags = UPF_BOOT_AUTOCONF, \
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.regshift = 2, \
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}
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/*
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* SystemACE: shortcut macro for single instance
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*/
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#define XPAR_SYSACE(num) { \
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.name = "xsysace", \
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.id = XPAR_SYSACE_##num##_DEVICE_ID, \
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.num_resources = 2, \
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.resource = (struct resource[]) { \
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{ \
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.start = XPAR_SYSACE_##num##_BASEADDR, \
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.end = XPAR_SYSACE_##num##_HIGHADDR, \
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.flags = IORESOURCE_MEM, \
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}, \
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{ \
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.start = XPAR_INTC_0_SYSACE_##num##_VEC_ID, \
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.flags = IORESOURCE_IRQ, \
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}, \
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}, \
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}
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/*
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* ML300/ML403 Video Device: shortcut macro for single instance
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*/
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#define XPAR_TFT(num) { \
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.name = "xilinxfb", \
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.id = num, \
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.num_resources = 1, \
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.resource = (struct resource[]) { \
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{ \
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.start = XPAR_TFT_##num##_BASEADDR, \
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.end = XPAR_TFT_##num##_BASEADDR+7, \
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.flags = IORESOURCE_IO, \
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}, \
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}, \
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}
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/* UART 8250 driver platform data table */
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struct plat_serial8250_port virtex_serial_platform_data[] = {
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#if defined(XPAR_UARTNS550_0_BASEADDR)
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XPAR_UART(0),
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#endif
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#if defined(XPAR_UARTNS550_1_BASEADDR)
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XPAR_UART(1),
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#endif
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#if defined(XPAR_UARTNS550_2_BASEADDR)
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XPAR_UART(2),
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#endif
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#if defined(XPAR_UARTNS550_3_BASEADDR)
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XPAR_UART(3),
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#endif
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#if defined(XPAR_UARTNS550_4_BASEADDR)
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XPAR_UART(4),
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#endif
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#if defined(XPAR_UARTNS550_5_BASEADDR)
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XPAR_UART(5),
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#endif
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#if defined(XPAR_UARTNS550_6_BASEADDR)
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XPAR_UART(6),
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#endif
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#if defined(XPAR_UARTNS550_7_BASEADDR)
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XPAR_UART(7),
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#endif
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{ }, /* terminated by empty record */
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};
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struct platform_device virtex_platform_devices[] = {
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/* UARTLITE instances */
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#if defined(XPAR_UARTLITE_0_BASEADDR)
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XPAR_UARTLITE(0),
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#endif
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#if defined(XPAR_UARTLITE_1_BASEADDR)
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XPAR_UARTLITE(1),
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#endif
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#if defined(XPAR_UARTLITE_2_BASEADDR)
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XPAR_UARTLITE(2),
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#endif
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#if defined(XPAR_UARTLITE_3_BASEADDR)
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XPAR_UARTLITE(3),
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#endif
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#if defined(XPAR_UARTLITE_4_BASEADDR)
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XPAR_UARTLITE(4),
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#endif
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#if defined(XPAR_UARTLITE_5_BASEADDR)
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XPAR_UARTLITE(5),
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#endif
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#if defined(XPAR_UARTLITE_6_BASEADDR)
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XPAR_UARTLITE(6),
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#endif
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#if defined(XPAR_UARTLITE_7_BASEADDR)
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XPAR_UARTLITE(7),
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#endif
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/* Full UART instances */
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#if defined(XPAR_UARTNS550_0_BASEADDR)
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{
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.name = "serial8250",
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.id = 0,
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.dev.platform_data = virtex_serial_platform_data,
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},
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#endif
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/* SystemACE instances */
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#if defined(XPAR_SYSACE_0_BASEADDR)
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XPAR_SYSACE(0),
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#endif
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#if defined(XPAR_SYSACE_1_BASEADDR)
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XPAR_SYSACE(1),
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#endif
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#if defined(XPAR_TFT_0_BASEADDR)
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XPAR_TFT(0),
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#endif
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#if defined(XPAR_TFT_1_BASEADDR)
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XPAR_TFT(1),
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#endif
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#if defined(XPAR_TFT_2_BASEADDR)
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XPAR_TFT(2),
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#endif
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#if defined(XPAR_TFT_3_BASEADDR)
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XPAR_TFT(3),
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#endif
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};
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/* Early serial support functions */
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static void __init
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virtex_early_serial_init(int num, struct plat_serial8250_port *pdata)
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{
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#if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB)
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struct uart_port serial_req;
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memset(&serial_req, 0, sizeof(serial_req));
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serial_req.mapbase = pdata->mapbase;
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serial_req.membase = pdata->membase;
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serial_req.irq = pdata->irq;
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serial_req.uartclk = pdata->uartclk;
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serial_req.regshift = pdata->regshift;
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serial_req.iotype = pdata->iotype;
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serial_req.flags = pdata->flags;
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gen550_init(num, &serial_req);
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#endif
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}
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void __init
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virtex_early_serial_map(void)
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{
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#ifdef CONFIG_SERIAL_8250
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struct plat_serial8250_port *pdata;
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int i = 0;
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pdata = virtex_serial_platform_data;
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while(pdata && pdata->flags) {
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pdata->membase = ioremap(pdata->mapbase, 0x100);
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virtex_early_serial_init(i, pdata);
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pdata++;
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i++;
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}
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#endif /* CONFIG_SERIAL_8250 */
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}
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/*
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* default fixup routine; do nothing and return success.
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*
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* Reimplement this routine in your custom board support file to
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* override the default behaviour
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*/
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int __attribute__ ((weak))
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virtex_device_fixup(struct platform_device *dev)
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{
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return 0;
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}
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static int __init virtex_init(void)
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{
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struct platform_device *index = virtex_platform_devices;
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unsigned int ret = 0;
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int i;
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for (i = 0; i < ARRAY_SIZE(virtex_platform_devices); i++, index++) {
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if (virtex_device_fixup(index) != 0)
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continue;
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if (platform_device_register(index)) {
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ret = 1;
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printk(KERN_ERR "cannot register dev %s:%d\n",
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index->name, index->id);
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}
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}
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return ret;
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}
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subsys_initcall(virtex_init);
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