cc26b3b01b
Add minimal omap3430 support based on earlier patches from Syed Mohammed Khasim. Also merge in omap34xx SRAM support from Karthik Dasu and use consistent naming for sram init functions. Also do following changes that make 34xx support usable: - Remove unused sram.c functions for 34xx - Rename IRQ_SIR_IRQ to INTCPS_SIR_IRQ and define it locally in entry-macro.S - Update mach-omap2/io.c to support 2420, 2430, and 34xx - Also merge in 34xx GPMC changes to add fields wr_access and wr_data_mux_bus from Adrian Hunter - Remove memory initialization call omap2_init_memory() until until more generic memory initialization patches are posted. It's OK to rely on bootloader initialization until then. Signed-off-by: Syed Mohammed, Khasim <khasim@ti.com> Signed-off-by: Karthik Dasu<karthik-dp@ti.com> Signed-off-by: Adrian Hunter <ext-adrian.hunter@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
207 lines
4.4 KiB
C
207 lines
4.4 KiB
C
/*
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* linux/arch/arm/mach-omap2/io.c
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*
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* OMAP2 I/O mapping code
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*
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* Copyright (C) 2005 Nokia Corporation
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* Copyright (C) 2007 Texas Instruments
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*
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* Author:
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* Juha Yrjola <juha.yrjola@nokia.com>
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* Syed Khasim <x0khasim@ti.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <asm/tlb.h>
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#include <asm/io.h>
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#include <asm/mach/map.h>
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#include <mach/mux.h>
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#include <mach/omapfb.h>
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#include <mach/sram.h>
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#include "memory.h"
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#include "clock.h"
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#include <mach/powerdomain.h>
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#include "powerdomains.h"
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#include <mach/clockdomain.h>
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#include "clockdomains.h"
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/*
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* The machine specific code may provide the extra mapping besides the
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* default mapping provided here.
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*/
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#ifdef CONFIG_ARCH_OMAP24XX
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static struct map_desc omap24xx_io_desc[] __initdata = {
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{
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.virtual = L3_24XX_VIRT,
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.pfn = __phys_to_pfn(L3_24XX_PHYS),
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.length = L3_24XX_SIZE,
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.type = MT_DEVICE
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},
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{
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.virtual = L4_24XX_VIRT,
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.pfn = __phys_to_pfn(L4_24XX_PHYS),
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.length = L4_24XX_SIZE,
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.type = MT_DEVICE
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},
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};
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#ifdef CONFIG_ARCH_OMAP2420
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static struct map_desc omap242x_io_desc[] __initdata = {
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{
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.virtual = DSP_MEM_24XX_VIRT,
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.pfn = __phys_to_pfn(DSP_MEM_24XX_PHYS),
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.length = DSP_MEM_24XX_SIZE,
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.type = MT_DEVICE
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},
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{
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.virtual = DSP_IPI_24XX_VIRT,
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.pfn = __phys_to_pfn(DSP_IPI_24XX_PHYS),
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.length = DSP_IPI_24XX_SIZE,
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.type = MT_DEVICE
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},
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{
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.virtual = DSP_MMU_24XX_VIRT,
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.pfn = __phys_to_pfn(DSP_MMU_24XX_PHYS),
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.length = DSP_MMU_24XX_SIZE,
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.type = MT_DEVICE
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},
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};
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#endif
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#ifdef CONFIG_ARCH_OMAP2430
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static struct map_desc omap243x_io_desc[] __initdata = {
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{
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.virtual = L4_WK_243X_VIRT,
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.pfn = __phys_to_pfn(L4_WK_243X_PHYS),
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.length = L4_WK_243X_SIZE,
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.type = MT_DEVICE
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},
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{
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.virtual = OMAP243X_GPMC_VIRT,
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.pfn = __phys_to_pfn(OMAP243X_GPMC_PHYS),
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.length = OMAP243X_GPMC_SIZE,
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.type = MT_DEVICE
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},
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{
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.virtual = OMAP243X_SDRC_VIRT,
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.pfn = __phys_to_pfn(OMAP243X_SDRC_PHYS),
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.length = OMAP243X_SDRC_SIZE,
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.type = MT_DEVICE
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},
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{
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.virtual = OMAP243X_SMS_VIRT,
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.pfn = __phys_to_pfn(OMAP243X_SMS_PHYS),
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.length = OMAP243X_SMS_SIZE,
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.type = MT_DEVICE
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},
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};
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#endif
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#endif
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#ifdef CONFIG_ARCH_OMAP34XX
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static struct map_desc omap34xx_io_desc[] __initdata = {
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{
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.virtual = L3_34XX_VIRT,
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.pfn = __phys_to_pfn(L3_34XX_PHYS),
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.length = L3_34XX_SIZE,
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.type = MT_DEVICE
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},
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{
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.virtual = L4_34XX_VIRT,
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.pfn = __phys_to_pfn(L4_34XX_PHYS),
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.length = L4_34XX_SIZE,
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.type = MT_DEVICE
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},
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{
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.virtual = L4_WK_34XX_VIRT,
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.pfn = __phys_to_pfn(L4_WK_34XX_PHYS),
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.length = L4_WK_34XX_SIZE,
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.type = MT_DEVICE
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},
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{
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.virtual = OMAP34XX_GPMC_VIRT,
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.pfn = __phys_to_pfn(OMAP34XX_GPMC_PHYS),
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.length = OMAP34XX_GPMC_SIZE,
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.type = MT_DEVICE
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},
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{
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.virtual = OMAP343X_SMS_VIRT,
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.pfn = __phys_to_pfn(OMAP343X_SMS_PHYS),
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.length = OMAP343X_SMS_SIZE,
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.type = MT_DEVICE
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},
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{
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.virtual = OMAP343X_SDRC_VIRT,
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.pfn = __phys_to_pfn(OMAP343X_SDRC_PHYS),
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.length = OMAP343X_SDRC_SIZE,
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.type = MT_DEVICE
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},
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{
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.virtual = L4_PER_34XX_VIRT,
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.pfn = __phys_to_pfn(L4_PER_34XX_PHYS),
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.length = L4_PER_34XX_SIZE,
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.type = MT_DEVICE
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},
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{
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.virtual = L4_EMU_34XX_VIRT,
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.pfn = __phys_to_pfn(L4_EMU_34XX_PHYS),
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.length = L4_EMU_34XX_SIZE,
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.type = MT_DEVICE
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},
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};
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#endif
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void __init omap2_map_common_io(void)
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{
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#if defined(CONFIG_ARCH_OMAP2420)
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iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc));
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iotable_init(omap242x_io_desc, ARRAY_SIZE(omap242x_io_desc));
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#endif
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#if defined(CONFIG_ARCH_OMAP2430)
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iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc));
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iotable_init(omap243x_io_desc, ARRAY_SIZE(omap243x_io_desc));
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#endif
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#if defined(CONFIG_ARCH_OMAP34XX)
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iotable_init(omap34xx_io_desc, ARRAY_SIZE(omap34xx_io_desc));
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#endif
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/* Normally devicemaps_init() would flush caches and tlb after
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* mdesc->map_io(), but we must also do it here because of the CPU
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* revision check below.
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*/
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local_flush_tlb_all();
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flush_cache_all();
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omap2_check_revision();
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omap_sram_init();
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omapfb_reserve_sdram();
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}
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void __init omap2_init_common_hw(void)
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{
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omap2_mux_init();
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pwrdm_init(powerdomains_omap);
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clkdm_init(clockdomains_omap, clkdm_pwrdm_autodeps);
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omap2_clk_init();
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omap2_init_memory();
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gpmc_init();
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}
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