Suravee Suthikulpanit f125be1469 oprofile/x86: implement lsfr pseudo-random number generator for IBS ... This patch implements a linear feedback shift register (LFSR) for pseudo-random number generation for IBS. For IBS measurements it would be good to minimize memory traffic in the interrupt handler since every access pollutes the data caches. Computing a maximal period LFSR just needs shifts and ORs. The LFSR method is good enough to randomize the ops at low overhead. 16 pseudo-random bits are enough for the implementation and it doesn't matter that the pattern repeats with a fairly short cycle. It only needs to break up (hard) periodic sampling behavior. The logic was designed by Paul Drongowski. Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com> Signed-off-by: Robert Richter <robert.richter@amd.com>		2010-02-26 15:14:02 +01:00
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backtrace.c	perf events, x86/stacktrace: Make stack walking optional	2009-12-17 09:56:19 +01:00
init.c	x86: coding style fixes to arch/x86/oprofile/init.c	2008-04-17 17:40:49 +02:00
Makefile	x86/oprofile: reanaming op_model_athlon.c to op_model_amd.c	2008-07-26 11:48:14 +02:00
nmi_int.c	oprofile/x86: add Xeon 7500 series support	2010-01-25 15:34:53 +01:00
nmi_timer_int.c	x86: coding style fixes to arch/x86/oprofile/nmi_timer_int.c	2008-04-17 17:40:50 +02:00
op_counter.h	oprofile: Implement performance counter multiplexing	2009-07-20 16:33:53 +02:00
op_model_amd.c	oprofile/x86: implement lsfr pseudo-random number generator for IBS	2010-02-26 15:14:02 +01:00
op_model_p4.c	x86/oprofile: Modify initialization of num_virt_counters	2009-07-20 16:43:21 +02:00
op_model_ppro.c	perf: Do the big rename: Performance Counters -> Performance Events	2009-09-21 14:28:04 +02:00
op_x86_model.h	perf: Do the big rename: Performance Counters -> Performance Events	2009-09-21 14:28:04 +02:00