Module - Modules Disable

.gitlab-ci.yml

@@ -0,0 +1,132 @@
+# Using AaeonRemoteBuildPkg only. Mask this section if you want to use own project local .yml
+include:
+  - project: 'AAEON/Utility/AaeonRemoteBuildPkg'
+    file: '.gitlab-ci-project.yml'
+
+# Use project local .yml only. Unmask if you want to use it.
+#include:
+#  - local: '.gitlab-ci-project.yml'
+
+variables:
+  ## Build variables for ########################################################
+  ## AaeonRemoteBuild.bat %1 %2 %3 %4 %5:
+  ##   %1 PROJECT_REBUILD=BUILD_ALL
+  ##        1: Build all; 0: Build; 2: Skip Build process[Test Only]
+  ##   %2 PROJECT_SHA=SHA_FOLDER=not used any more. Reserved for compatibility.
+  ##   %3 PROJECT_VEB_FILE=VEB=file name (w/o extension)
+  ##   %4 PROJECT_VEB_TOOL=AptioV_DIR=VEB tool version
+  ##        Veb Support List:
+  ##          4.5.5_TOOLS_41
+  ##          Aptio_5.x_TOOLS_24_6
+  ##          Aptio_5.x_TOOLS_27
+  ##          Aptio_5.x_TOOLS_28
+  ##          Aptio_5.x_TOOLS_30_7
+  ##          Aptio_5.x_TOOLS_31_1
+  ##          Aptio_5.x_TOOLS_32_1
+  ##          Aptio_5.x_TOOLS_34_1
+  ##          Aptio_5.x_TOOLS_35
+  ##          Aptio_5.x_TOOLS_35_1
+  ##          Aptio_5.x_TOOLS_35_2
+  ##          Aptio_5.x_TOOLS_37_1
+  ##          Aptio_5.x_TOOLS_37_1_x64
+  ##          Aptio_5.x_TOOLS_JRE_34_1
+  ##          Aptio_5.x_TOOLS_40
+  ##   %5 PROJECT_BUILD_BATCH=batch file name (w/ .bat) used for compiling
+  ##      instead of using build commands defined in .veb.
+  ##      Optional, give un-exist file name to disable.
+  ## And for
+  ## AaeonRemoteDeploy.bat %1 %2:
+  ##   %1 COPY_OPTION
+  ##        0: For Gitlab remote deploy, copy all; 1: For local use, copy file listed; 2: Skip
+  ##   %2 PROJECT_SHA=SHA_FOLDER
+  ##        Name: Create SHA and Output folder; 0: Create Output folder only; 1: Create with short SHA
+  ##        Name example:
+  ##          $CI_COMMIT_SHORT_SHA: 8 chars
+  ##          $CI_COMMIT_SHA: Full sha
+  PROJECT_REBUILD: 1
+  PROJECT_SHA: $CI_COMMIT_SHA
+  PROJECT_VEB_FILE: BayTrail
+  PROJECT_VEB_TOOL: Aptio_5.x_TOOLS_26
+  PROJECT_BUILD_BATCH: N/A  ## Set to build.bat if project uses build.bat instead of make
+
+  ## Patching NameTooLong issue. Optional, unmask if needed to change for project -
+  ##GIT_CLONE_PATH: $CI_BUILDS_DIR\Build\$CI_CONCURRENT_ID\$GITLAB_USER_ID\$CI_PROJECT_ID
+
+  ## Release variables for ####################################################
+  ## AaeonRemotePreRelease.bat via environment
+  ##   PROJECT_RELEASE_DIR: Path to release folder
+  ##   PROJECT_CHANGELOG: Path to CHANGELOG file
+  ##   PROJECT_HISTORY: Path to History file
+  ##   PROJECT_FORMAL_HISTORY: Select to include internal commit message in History
+  ##     true/false - Show/hide internal messages [Test only]
+  ##     auto - Include internal messages only for beta version (refer to PROJECT_FORMAL_VERSION)
+  ##   PROJECT_FORMAL_VERSION: First formal release version in form of Major.Minor (ex: '1.0')
+  ##     When releasing a version - History.txt will be
+  ##       Same as formal      - reset as first release
+  ##       Smaller than formal - appended with internal changes
+  ##       Larger than formal  - appended w/o internal changes
+  PROJECT_RELEASE_DIR: AaeonRelease
+  PROJECT_CHANGELOG: CHANGELOG.md
+  PROJECT_HISTORY: $PROJECT_RELEASE_DIR\History.txt
+  PROJECT_FORMAL_HISTORY: auto
+  PROJECT_FORMAL_VERSION: '1.0'
+  ##   PROJECT_ONEDRIVE_RELATIVE_FOLDER: Folder name on Onedrive to release BIOS.
+  ##     Useful for ODM project's name is different with Onedrive folder name. This happens when -
+  ##       Project's name is too short, or conflict with other project's name
+  ##       Project's name is changed, but for some reason Onedrive folder is not changed accordingly
+  ##PROJECT_ONEDRIVE_RELATIVE_FOLDER: 'Some fixed string'
+  ##   PROJECT_SIGN_ON_FORM: Form to dynamically generate sign-on message in History.txt
+  ##     Possible phrases
+  ##       $(TOKEN) - To be replaced by parsed token. Support AAEON_MODEL_NAME, SYSTEM_PRODUCT_NAME, PROJECT_NAME
+  ##       {{signon_tag}} - To be replaced by BIOS tag. Ex: K860AM10
+  ##       {{signon_major}} - To be replaced by major version parsed from BIOS tag. Ex: 1
+  ##       {{signon_minor}} - To be replaced by minor version parsed from BIOS tag. Ex: 0
+  ## Optional, unmask if needed to change for customizing -
+  ##PROJECT_SIGN_ON_FORM: '$$(AAEON_MODEL_NAME) R{{signon_major}}.{{signon_minor}}({{signon_tag}}) ({{signon_date}})'
+
+  ## ReleaseDbg variables ####################################################
+  ## This feature will be enabled when either one of following files presents in project:
+  ## - AaeonPlatformDebugger\AaeonPlatformDebugger.sdl
+  ## - DebugEnable.sdl
+  ##
+  ##   PROJECT_DEBUG_CIF_PATH: Path to a .cif containing file name of .sdl file.
+  ##                           Default use one in AaeonRemoteBuildPkg with DebugEnable.sdl
+  ##   PROJECT_DEBUG_SDL_PATH: Path to a .sdl containing AMI SDL tokens to enable debug mode.
+  ##                           Default use one in AaeonRemoteBuildPkg
+  ## Optional, unmask if needed to change for project -
+  ##PROJECT_DEBUG_CIF_PATH: %REMOTE_BUILD_PATH%\DebugEnable\DebugEnable.cif
+  ##PROJECT_DEBUG_SDL_PATH: %REMOTE_BUILD_PATH%\DebugEnable\DebugEnable.sdl
+  ##PROJECT_DEBUG_SDL_PATH: DebugEnable.sdl  ## (Example for using one added in project root)
+
+# Overriding other configurations
+# Refer to https://docs.gitlab.com/ee/ci/yaml/includes.html#override-included-configuration-values for more detail
+
+# Example - Overriding deployed file list
+.build_files:
+  extends:
+    - .build_template  # To obtain "script" key which is required in all job.
+  artifacts:
+    paths:
+      - '*.[Bb][Ii][Nn]'
+      - 'build.log'
+      - '_Aaeon_Release\*.[Bb][Ii][Nn]'
+      - 'Build\Token.*'
+      - 'Build\Platform.*'
+      - 'Build\GSIOSETUPVAR.*'
+      - 'Build\*.inf'
+      - 'Build\PCIBRDSDL.*'
+      - 'Build\SIOBRDSDL.*'
+      - 'Build\*.hfr'
+      - 'Build\*.vfr'
+      - 'Build\*.asl'
+      - 'Build\*.uni'
+      - 'Build\*.sd'
+      - 'Build\*.mak'
+      - 'Build\*.h'
+      - 'Build\git-cliff\*'  ## for PreRelease result
+      - 'Build\AmiCrbMeRoms\*'  ## for AMI CRB Binary
+      - 'AmiFspBinaryBuildTemp\Token.*'
+      - 'AmiFspBinaryBuildTemp\Platform.*'
+      - 'AmiFspBinaryBuildTemp\*.mak'
+    expire_in: 1day
+    when: always

AaeonProject/AaeonProject.cif

@@ -0,0 +1,11 @@
+<component>
+	name = "AaeonProject"
+	category = Flavor
+	Rank = 59
+	LocalRoot = "AaeonProject\"
+	RefName = "AaeonProject"
+[files]
+"AaeonProject.sdl"
+[parts]
+
+<endComponent>

AaeonProject/AaeonProject.sdl

@@ -0,0 +1,311 @@
+TOKEN
+	Name  = "AaeonProject_SUPPORT"
+	Value  = "1"
+	TokenType = Boolean
+	TargetEQU = Yes
+	TargetMAK = Yes
+	TargetH = Yes
+	Master = Yes
+End
+
+TOKEN
+	Name  = "PROJECT_TAG"
+	Value  = "2000A"
+	TokenType = Expression
+	TargetMAK = Yes
+	TargetH = Yes
+	TargetEQU = Yes
+End
+TOKEN
+	Name  = "AAEON_MAJOR_VERSION"
+	Value  = "0"
+	TokenType = Expression
+	TargetMAK = Yes
+	TargetH = Yes
+	TargetEQU = Yes
+	Range  = "Maximum 3 digits"
+End
+TOKEN
+	Name  = "AAEON_MINOR_VERSION"
+	Value  = "1"
+	TokenType = Expression
+	TargetMAK = Yes
+	TargetH = Yes
+	TargetEQU = Yes
+	Range  = "Maximum 3 digits"
+End
+TOKEN
+	Name  = "BUILD_FOR_TEST"
+	Value  = "0"
+	TokenType = Boolean
+	TargetMAK = Yes
+	TargetH = Yes
+	TargetEQU = Yes
+End
+TOKEN
+	Name  = "AAEON_ROM"
+	Value  = "$(PROJECT_TAG)$(PROJECT_BUILD).rom"
+	TokenType = Expression
+	TargetMAK = Yes
+	TargetH = Yes
+	TargetEQU = Yes
+	Range  = "valid file name"
+End
+TOKEN
+	Name  = "AAEON_BIN"
+	Value  = "$(PROJECT_TAG)$(PROJECT_BUILD).bin"
+	TokenType = Expression
+	TargetMAK = Yes
+	TargetH = Yes
+	TargetEQU = Yes
+	Range  = "valid file name"
+End
+TOKEN
+	Name  = "PROJECT_BUILD"
+	Value  = "M$(AAEON_MAJOR_VERSION)$(AAEON_MINOR_VERSION)"
+	TokenType = Expression
+	TargetMAK = Yes
+	TargetH = Yes
+	TargetEQU = Yes
+	Range  = "Maximum 3 digits"
+	Token = "BUILD_FOR_TEST" "=" "0"
+End
+TOKEN
+	Name  = "PROJECT_BUILD"
+	Value  = "T$(AAEON_MAJOR_VERSION)$(AAEON_MINOR_VERSION)"
+	TokenType = Expression
+	TargetMAK = Yes
+	TargetH = Yes
+	TargetEQU = Yes
+	Range  = "Maximum 3 digits"
+	Token = "BUILD_FOR_TEST" "=" "1"
+End
+TOKEN
+	Name  = "BIOS_TAG"
+	Value  = "$(PROJECT_TAG)$(PROJECT_BUILD)"
+	TokenType = Expression
+	TargetEQU = Yes
+	TargetH = Yes
+	TargetMAK = Yes
+End
+TOKEN
+	Name  = "AMI_ROM"
+	Value  = "$(AAEON_ROM)"
+	TokenType = Expression
+	TargetMAK = Yes
+	TargetH = Yes
+	Range  = "valid file name"
+End
+
+TOKEN
+	Name  = "EC_SUPPORT"
+	Value  = "0"
+	TokenType = Boolean
+	TargetEQU = Yes
+	TargetH = Yes
+End
+
+##// {2815ee9f-c8eb-4782-b85f-81815a6fa91b}
+##static const struct GUID __NAME__ = {0x2815ee9f, 0xc8eb, 0x4782, {0xb8, 0x5f, 0x81, 0x81, 0x5a, 0x6f, 0xa9, 0x1b}};
+TOKEN
+	Name  = "PLATFORM_GUID"
+	Value  = "2815ee9f-c8eb-4782-b85f-81815a6fa91b"
+	Help  = "The unique platform GUID that does into the description file.\MUST BE CLONED IN EVERY PROJECT!"
+	TokenType = Expression
+	TargetDSC = Yes
+End
+
+TOKEN
+	Name  = "FW_VERSION_GUID"
+	Value  = "{0x2815ee9f, 0xc8eb, 0x4782, {0xb8, 0x5f, 0x81, 0x81, 0x5a, 0x6f, 0xa9, 0x1b}}"
+	Help  = "FW Version GUID inserted into Firmware ID structure.\FW version has to be overridden for every project."
+	TokenType = Expression
+	TargetH = Yes
+	Range  = "GUID"
+End
+
+TOKEN
+	Name  = "ADJUST_GPIO_SUPPORT"
+	Value  = "0"
+	TokenType = BOOLEAN
+	TargetH = Yes
+End
+
+TOKEN
+    Name  = "SILENT"
+    Value  = "1"
+    Help  = "Enables/disables silent build mode.\In silent build mode executed commands are not displayed, and certain auxiliary build process messages are suppressed or displayed in a condensed format.\In non-silent build mode executed command are displayed prior to execution, and all auxiliary messages are visible.\Silent build mode is typically faster because less information goes into a build log.\Non-silent mode is useful for debugging of the build issues."
+    TokenType = Boolean
+    TargetMAK = Yes
+End
+
+TOKEN
+    Name  = "BYTI_DUAL_BOOT_TXE_SUPPORT"
+    Value  = "0"
+    Help  = "Enable the token to build BIOS include BayTrail-I Dual Boot 1.375MB TXE"
+    TokenType = Boolean
+    TargetMAK = Yes
+    TargetH = Yes
+End
+
+TOKEN
+	Name  = "TXE_1_375MB_SUPPORT"
+	Value  = "1"
+	Help  = "Enable the token to build BIOS include 1.375MB TXE"
+  	TokenType = Boolean
+	TargetMAK = Yes
+	TargetH = Yes
+End
+
+TOKEN
+	Name  = "AMI_DESKTOP_ROM_8MB_TXE_1_375MB"
+	Value  = "$(AAEON_BIN)"
+	Help  = "File name of the Full BIOS rom image."
+	TokenType = Expression
+	TargetMAK = Yes
+	TargetH = Yes
+	Range  = "valid file name"
+End
+
+TOKEN
+	Name  = "===== Module Disable ====="
+	TokenType = Integer
+End
+
+TOKEN
+    Name  = "CRB_SETUP_SUPPORT"
+    Value  = "0"
+    Help  = "Main switch to enable CRB Setup support in Project"
+    TokenType = Boolean
+    TargetMAK = Yes
+    TargetH = Yes
+End
+
+TOKEN
+    Name  = "WIN8_FIRMWARE_UPDATE_SUPPORT"
+    Value  = "0"
+    Help  = "Enables/Disables the Windows 8.x firmware update support."
+    TokenType = Integer
+    TargetMAK = Yes
+    TargetH = Yes
+End
+
+TOKEN
+	Name  = "KBC_SUPPORT"
+	Value  = "0"
+	Help  = "Enable/Disable KBC support"
+	TokenType = Boolean
+	TargetEQU = Yes
+	TargetMAK = Yes
+	TargetH = Yes
+End
+
+TOKEN
+    Name  = "EdkShellBinPkg_SUPPORT"
+    Value  = "0"
+    Help  = "Main switch to enable EdkShellBinPkg support in Project"
+    TokenType = Boolean
+    TargetEQU = Yes
+    TargetMAK = Yes
+End
+
+TOKEN
+    Name  = SECURE_FLASH_SUPPORT
+    Value  = "0"
+    TokenType = Boolean
+    TargetEQU = Yes
+    TargetMAK = Yes
+    Help  = "Main switch to enable Security Flash in Project"
+End
+
+TOKEN
+	Name  = "ISCT_PLATFORM_SUPPORT"
+	Value  = "0"
+	Help  = "Main switch to enable ISCT support in Project"
+	TokenType = Boolean
+	TargetEQU = Yes
+	TargetMAK = Yes
+End
+
+TOKEN
+    Name  = HARDWARE_SIGNATURE_MANAGEMENT_SUPPORT
+    Value  = "0"
+    TokenType = Boolean
+    TargetEQU = Yes
+    TargetMAK = Yes
+    TargetH = Yes
+    Help  = "Main switch to enable HardwareSignatureManagement support in Project"
+End
+
+TOKEN
+	Name  = "POST_TIME_TUNING_SUPPORT"
+	Value  = "0"
+	Help  = "Main switch to enable Post Time Tuning module in Project"
+	TokenType = Boolean
+	TargetEQU = Yes
+	TargetMAK = Yes
+	TargetH = Yes
+End
+
+TOKEN
+	Name  = "Ipv6_SUPPORT"
+	Value  = "0"
+	Help  = "Main switch to enable Ipv6 stack support in Project"
+	TokenType = Boolean
+	TargetMAK = Yes
+	TargetH = Yes
+End
+
+TOKEN
+	Name  = "PS2Ctl_SUPPORT"
+	Value  = "0"
+	Help  = "Main switch to enable PS2 Controller support in the project."
+	TokenType = Boolean
+	TargetEQU = Yes
+	TargetMAK = Yes
+End
+
+TOKEN
+	Name  = "MMC_SUPPORT"
+	Value  = "0"
+	Help  = "This driver is not POR for BayTrail D&M and also doesn't test."
+	TokenType = Boolean
+	TargetH = Yes
+End
+
+TOKEN
+	Name  = "I2C_SUPPORT"
+	Value  = "0"
+	Help  = "Disable\Enable I2C feature."
+	TokenType = Boolean
+	TargetH = Yes
+End
+
+TOKEN
+    Name  = "OpalSecurity_SUPPORT"
+    Value  = "0"
+    Help  = "Main switch to enable OpalSecurity support in Project"
+    TokenType = Boolean
+    TargetH = Yes
+End
+
+TOKEN
+    Name  = "OA3_SUPPORT"
+    Value = "0"
+    Help  = "Main switch to enable OA3 support in the project"
+    TokenType = Boolean
+    TargetH = Yes
+End
+
+TOKEN
+	Name  = "OA2_SUPPORT"
+	Value  = "0"
+	Help  = "Main switch to enable OA2 support in Project"
+	TokenType = Boolean
+	TargetH = Yes
+End
+
+TOKEN
+	Name  = " "
+	TokenType = Integer
+End

BayTrail.veb

@@ -86,7 +86,7 @@
 "MdeModulePkg\Universal\TimestampDxe\Timestamp.cif"= "SS: AptioV;$/AptioV/Source/Modules/Timestamp;Timestamp_00"
 "UefiCpuPkg\CpuIo.cif"= "SS: AptioV;$/AptioV/Source/Modules/CpuIo;5.004_CpuIo_01"
 "AmiModulePkg\IO\AmiSioCore.cif"= Private
-"AmiModulePkg\IO\NPCE791x\NPCE791x.cif"= Private
+
 "AmiModulePkg\Flash\Flash.cif"= "SS: AptioV;$/AptioV/Source/Hardware/Flash/Flash;5.004_Flash_09"
 "AmiModulePkg\Flash\FWH\FwhFlash.cif"= "SS: AptioV;$/AptioV/Source/Hardware/Flash/Flash/FWH;5.004_Flash_09"
 "AmiModulePkg\Flash\LPC\LpcFlash.cif"= "SS: AptioV;$/AptioV/Source/Hardware/Flash/Flash/LPC;5.004_Flash_09"
@@ -540,3 +540,4 @@
 "BayTrailPkg\Library\KscLib\KscLib.cif"= Private
 "BayTrailPkg\CrbSmiFlashHook\CrbSmiFlashHook.cif"= Private
 "BayTrail.cif"= Private
+"AaeonProject\AaeonProject.cif"

RomImage/BayTrail_Desktop_8MB_TXE_1.375MB.xml

@@ -6,7 +6,7 @@
 		<BuildCompactImage value="false"/>
 		<RegionOrder value="4321"/>
 		<EndManufacturingBitOverride value="false"/>
-		<Platform value="3"/>
+		<Platform value="4"/>
 	</ProgSettings>
 	<Chipset>
 		<Region0 name="Descriptor Region">
@@ -64,18 +64,19 @@
 				</SocStrap0>
 				<SocStrap2>
 					<SpiBootBlockSize value="00: 64KB (Default): Invert A16 if Top Swap is enabled." value_list="00: 64KB (Default): Invert A16 if Top Swap is enabled.,,01: 128KB: Invert A17 if Top Swap is enabled.,,10: 256KB: Invert A18 if Top Swap is enabled." edit="true" visible="true" name="SPI Boot Block Size" help_text="Sets SPI Boot Block Size."/>
-					<LPSS1_F0_Disable value="false" edit="true" visible="true" name="SIO1 F0 Disable" help_text="Disable LPSS1 function 0 (DMA). false = enable. true = disable."/>
-					<LPSS1_F1_Disable value="false" edit="true" visible="true" name="SIO1 F1 Disable" help_text="Disable LPSS1 function 1 (PWM#1). false = enable. true = disable."/>
-					<LPSS1_F2_Disable value="false" edit="true" visible="true" name="SIO1 F2 Disable" help_text="Disable LPSS1 function 2 (PWM#2). false = enable. true = disable."/>
-					<LPSS1_F3_Disable value="false" edit="true" visible="true" name="SIO1 F3 Disable" help_text="Disable LPSS1 function 3 (HSUART#1). false = enable. true = disable."/>
-					<LPSS1_F4_Disable value="false" edit="true" visible="true" name="SIO1 F4 Disable" help_text="Disable LPSS1 function 4 (HSUART#2). false = enable. true = disable."/>
-					<LPSS1_F5_Disable value="false" edit="true" visible="true" name="SIO1 F5 Disable" help_text="Disable LPSS1 function 5 (SPI). false = enable. true = disable."/>
-					<SccEmmcDisable value="false" edit="true" visible="true" name="SCC eMMC 4.41 Disable" help_text="Disable legacy eMMC 4.41. false = enable. true = disable."/>
-					<SccEmmcPlusDisable value="false" edit="true" visible="true" name="SCC eMMC 4.5 Disable" help_text="Disable eMMC 4.5. false = enable. true = disable."/>
-					<SccSdioDisable value="false" edit="true" visible="true" name="SCC SDIO Disable" help_text="Disable SDIO. false = enable. true = disable."/>
+					<LPSS1_F0_Disable value="false" edit="false" visible="true" name="SIO1 F0 Disable" help_text="Disable SIO1 function 0 (DMA). false = enable. true = disable."/>
+					<LPSS1_F1_Disable value="true" edit="true" visible="true" name="SIO1 F1 Disable" help_text="Disable LPSS1 function 1 (PWM#1). false = enable. true = disable."/>
+					<LPSS1_F2_Disable value="true" edit="true" visible="true" name="SIO1 F2 Disable" help_text="Disable LPSS1 function 2 (PWM#2). false = enable. true = disable."/>
+					<LPSS1_F3_Disable value="true" edit="true" visible="true" name="SIO1 F3 Disable" help_text="Disable LPSS1 function 3 (HSUART#1). false = enable. true = disable."/>
+					<LPSS1_F4_Disable value="true" edit="true" visible="true" name="SIO1 F4 Disable" help_text="Disable LPSS1 function 4 (HSUART#2). false = enable. true = disable."/>
+					<LPSS1_F5_Disable value="true" edit="true" visible="true" name="SIO1 F5 Disable" help_text="Disable LPSS1 function 5 (SPI). false = enable. true = disable."/>
+					<SccEmmcDisable value="true" edit="true" visible="true" name="SCC eMMC 4.41 Disable" help_text="Disable legacy eMMC 4.41. false = enable. true = disable."/>
+					<SccEmmcPlusDisable value="true" edit="true" visible="true" name="SCC eMMC 4.5 Disable" help_text="Disable eMMC 4.5. false = enable. true = disable."/>
+					<SccSdioDisable value="true" edit="true" visible="true" name="SCC SDIO Disable" help_text="Disable SDIO. false = enable. true = disable."/>
 					<SccSdcardDisable value="false" edit="true" visible="true" name="SCC SDCARD Disable" help_text="Disable SDCARD. false = enable. true = disable."/>
 					<HDA_Disable value="false" edit="true" visible="true" name="HDA Disable" help_text="Disable HD Audio: false = enable, true = disable."/>
-					<LpeDisable value="false" edit="true" visible="true" name="LPE Disable" help_text="Disable LPE. false = enable. true = disable."/>
+					<LpeDisable value="true" edit="true" visible="true" name="LPE Disable" help_text="Disable LPE. false = enable. true = disable."/>
+					<OtgDisable value="true" edit="true" visible="true" name="USB3 (OTG) Disable" help_text="Disable USB3 Device. false = enable. true = disable."/>
 					<UshDisable value="false" edit="true" visible="true" name="XHCI Disable" help_text="Disable USH. false = enable. true = disable."/>
 					<LAN_Disable value="true" edit="true" visible="true" name="LAN Disable" help_text="Disable GbE: false = enable, true = disable."/>
 					<SATA_Disable value="false" edit="true" visible="true" name="SATA Disable" help_text="Disable SATA: false = enable, true = disable."/>
@@ -84,7 +85,7 @@
 					<PCIe1_Disable value="false" edit="true" visible="true" name="PCIe 1 Disable" help_text="Disable PCIe port 1: false = enable, true = disable."/>
 					<PCIe2_Disable value="false" edit="true" visible="true" name="PCIe 2 Disable" help_text="Disable PCIe port 2: false = enable, true = disable."/>
 					<PCIe3_Disable value="false" edit="true" visible="true" name="PCIe 3 Disable" help_text="Disable PCIe port 3: false = enable, true = disable."/>
-					<LPSS2_F0_Disable value="false" edit="true" visible="true" name="SIO2 F0 Disable" help_text="Disable LPSS2 function 0 (I2C#0). false = enable. true = disable."/>
+					<LPSS2_F0_Disable value="false" edit="false" visible="true" name="SIO2 F0 Disable" help_text="Disable SIO2 function 0 (I2C#0). false = enable. true = disable."/>
 					<LPSS2_F1_Disable value="false" edit="true" visible="true" name="SIO2 F1 Disable" help_text="Disable LPSS2 function 1 (I2C#1). false = enable. true = disable."/>
 					<LPSS2_F2_Disable value="false" edit="true" visible="true" name="SIO2 F2 Disable" help_text="Disable LPSS2 function 2 (I2C#2). false = enable. true = disable."/>
 					<LPSS2_F3_Disable value="false" edit="true" visible="true" name="SIO2 F3 Disable" help_text="Disable LPSS2 function 3 (I2C#3). false = enable. true = disable."/>
@@ -96,10 +97,8 @@
 					<LPSS2_F7_Disable value="false" edit="true" visible="true" name="SIO2 F7 Disable" help_text="Disable LPSS2 function 7 (I2C#7). false = enable. true = disable."/>
 					<DisBendClk_Ssen value="false" edit="true" visible="true" name="DISBENDCLK_SSEN" help_text="Enable spread spectrum to DISPLAY BEND: false = disable, true = enable."/>
 					<DispSsClk_Ssen value="false" edit="true" visible="true" name="DISPSSCLK_SSEN" help_text="Enable spread spectrum to DISPLAY SS: false = disable, true = enable."/>
-					<PciClk_Ssen value="false" edit="true" visible="true" name="PCIECLK_SSEN" help_text="Enable spread spectrum to PCIe: false = disable, true = enable."/>
-					<SataClk_Ssen value="false" edit="true" visible="true" name="SATACLK_SSEN" help_text="Enable spread spectrum to SATA: false = disable, true = enable."/>
 					<SmbusDisable value="false" edit="true" visible="true" name="SMBUS Disable" help_text="Disable SMBus. false = enable. true = disable."/>
-					<OtgSsDisable value="false" edit="true" visible="true" name="OTG Super Speed PHY Disable" help_text="Disable OTG Super Speed PHY. false = enable. true = disable."/>
+					<OtgSsDisable value="true" edit="true" visible="true" name="OTG Super Speed PHY Disable" help_text="Disable OTG Super Speed PHY. false = enable. true = disable."/>
 					<UshSsDisable value="false" edit="true" visible="true" name="XHCI Super Speed PHY Disable" help_text="Disable USH Super Speed PHY. false = enable. true = disable."/>
 					<SscTable value="0.456" value_list="0.456,,0.439,,0.423,,0.391,,0.293,,0.260,,0.244,,0.195,,0.098" edit="true" visible="true" name="Spread Percentage" help_text="Select Spread Percentage (%). 0.456 is Intel recommended value. Other values are for testing purposes only."/>
 				</SocStrap3>
@@ -112,7 +111,14 @@
 					<StgRen value="1 - PCIe PHY PS Configuration enabled (default)." value_list="0 - PCIe PHY PS Configuration disabled (debug mode).,,1 - PCIe PHY PS Configuration enabled (default)." edit="true" visible="true" name="PCIe PHY PS Configuration" help_text="Sets the default PCIe PHY Configuration. 1 - PCIe PHY PS Configuration enabled (default). 0 - PCIe PHY PS Configuration disabled (debug mode)."/>
 					<LaneReversal value="0: no lane reversal." value_list="0: no lane reversal.,,1: lane reversal." edit="true" visible="true" name="Lane Reversal" help_text="Lane reversal: 0 = no lane reversal, 1 = lane reversal."/>
 					<RootPortConfig value="00: 4x1s Port 1 (x1), Port 2 (x1), Port 3 (x1), Port 4 (x1)." value_list="00: 4x1s Port 1 (x1), Port 2 (x1), Port 3 (x1), Port 4 (x1).,,01: 1x2, 2 x1s Port 1 (x2), Port 3 (x1), Port 4 (x1).,,10: 2x2 Port 1 (x2), Port 3 (x2).,,11: 1x4 Port 1 (x4)." edit="true" visible="true" name="Root Port Configuration" help_text="Set the default value of Root Port Configuration."/>
+					<FRST value="0: normal operation." value_list="0: normal operation.,,1: Fast Reset." edit="true" visible="true" name="Fast Reset (FRST)" help_text="0 = normal operation, 1 = Fast Reset."/>
 				</SocStrap5>
+				<SocStrap6 name="SOC Strap 6">
+					<SataP5Pciep2Mode value="0x0" edit="true" visible="true" name="SATAP5 PCIEP2 MODE STRAP" help_text="SATA/PCIe Shared Port for USB Port 5 and PCIe Port 2 Mode."/>
+					<SataP4Pciep1Mode value="0x0" edit="true" visible="true" name="SATAP4 PCIEP1 MODE STRAP" help_text="SATA/PCIe Shared Port for USB Port 4 and PCIe Port 1 Mode."/>
+					<Usb3P4Pciep1Mode value="0x0" edit="true" visible="true" name="USB3P4 PCIEP1 MODE" help_text="USB3/PCIe Shared Port for USB Port 4 and PCIe Port 1 Mode."/>
+					<Usb3P5Pciep2Mode value="0x0" edit="true" visible="true" name="USB3P5 PCIEP2 MODE" help_text="USB3/PCIe Shared Port for USB Port 5 and PCIe Port 2 Mode."/>
+				</SocStrap6>
 				<SocStrap7 name="SOC Strap 7">
 					<PcieCmnlnPwrEn value="true" edit="true" visible="true" name="PCIECMNLNPW Enable" help_text="false = disable, true = enable. Note: Integrated clock usage and specs must be signed off by SEG architects."/>
 					<PcieLane0PwrEn value="true" edit="true" visible="true" name="PCIELANE0PWREN" help_text="PCIE Enables power for digital (synthesized) logic for the Common Lane logic and PLL1Core uPAR: false = disable, true = enable."/>
@@ -125,7 +131,7 @@
 					<SataCmnlnPwrEn value="true" edit="true" visible="true" name="SATACMNLNPW Enable" help_text="false = disable, true = enable. Note: Integrated clock usage and specs must be signed off by SEG architects."/>
 					<SataLane0PwrEn value="true" edit="true" visible="true" name="SATALANE0PWREN" help_text="SATA Enables power for digital (synthesized) logic for the Common Lane logic and PLL1Core uPAR: false = disable, true = enable."/>
 					<SataLane1PwrEn value="true" edit="true" visible="true" name="SATALANE1PWREN" help_text="SATA Enables power for digital (synthesized) logic in the data lane to reduce leakage."/>
-					<SataStatus2Pmc value="true" edit="true" visible="true" name="satastatus2PMC" help_text="false: sata to indicate D3 status to PMC. true: sata to indicate DEVSLP status to PMC."/>
+					<SataStatus2Pmc value="false" edit="true" visible="true" name="satastatus2PMC" help_text="false: sata to indicate D3 status to PMC. true: sata to indicate DEVSLP status to PMC."/>
 				</SocStrap8>
 			</SocStraps>
 			<VsccTable name="VSCC Table">
@@ -185,10 +191,10 @@
 			<RegionOffset value="0x00000000" edit="true" visible="true" name="Region Offset" help_text="The offset from the beginning of flash where the TXE region will start. If 0, then FITC will determine where to put it based on the region order."/>
 			<RomBypassVector value="00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 " edit="true" visible="false" name="Rom Bypass Vector Instruction" help_text="Up to 128 bits, this field represents the instruction that is placed at the beginning of the FPT used to jump to the Rom Bypass partition."/>
 			<RegionLength value="0x00000000" edit="true" visible="false" name="TXE region length" help_text="This is the size of the TXE region in bytes. Set this to 0 to make the region length equal to the binary file length (rounded up to 4k). Extra space will be filled with 0xFF."/>
-			<FlashCycleLifetime value="7" edit="true" visible="false" name="Flash Cycle Lifetime" help_text="Time in years the flash should last."/>
-			<FlashCycleLimit value="100" edit="true" visible="false" name="Flash Cycle Limit" help_text="This number multiplied by 1000 equals the maximum number of erase cycles the flash can perform."/>
-			<TicksToAdd value="0x0007" edit="false" visible="false" name="Ticks to add" help_text="This is used for access management."/>
-			<TokensToAdd value="0x0064" edit="false" visible="false" name="Tokens to add" help_text="This is used for access management."/>
+			<FlashCycleLifetime value="7" edit="false" visible="false" name="Flash Cycle Lifetime" help_text="Time in years the flash should last."/>
+			<FlashCycleLimit value="100" edit="false" visible="false" name="Flash Cycle Limit" help_text="This number multiplied by 1000 equals the maximum number of erase cycles the flash can perform."/>
+			<TicksToAdd value="0x0007" edit="true" visible="false" name="Ticks to add" help_text="This is used for access management."/>
+			<TokensToAdd value="0x0064" edit="true" visible="false" name="Tokens to add" help_text="This is used for access management."/>
 			<FptHeaderVer value="0x20" edit="false" visible="false" name="FPT Header Version" help_text="Defines the FPT header type set in the FPT header."/>
 			<FptEntryType value="0x10" edit="false" visible="false" name="FPT Entry Type" help_text="Defines the FPT entry type set in the FPT header that defines the type of entries used in the FPT."/>
 			<SecLayoutType value="0" edit="false" visible="false" name="TXE Layout Type" help_text="This setting reflects the layout type used after modifying the build settings."/>
@@ -198,7 +204,7 @@
 					<HostSecRegUnlock value="true" edit="true" visible="true" name="Host TXE Region Flash Protection Override" help_text="Set this to TRUE if you want the ability to have BIOS write to the TXE Region. Set to FALSE to opt out."/>
 					<OemTag value="0x00000000" edit="true" visible="true" name="OEM Tag" help_text="An OEM identification number to describe the flash image represented by the value."/>
 					<HideFwUpdCtrl value="false" edit="true" visible="true" name="Hide FW Update Control" help_text="Setting this parameter to 'true' will not allow end users to 'disable' or 'password protect' the TXE FW Update mechanism"/>
-					<FpfMirroringFile value="FpfMirrorNvarValues.txt" edit="true" visible="true" name="FPF Mirroring File" help_text="Enter a path to the FPF mirroring file. Note: This option will create a FPF configuration for TXE Firmware to emulate fuse configuration for testing purpose. This option will not program real fuses. Fuse values programmed here will not be used once manufacturing is closed. Real fuses should be programmed using Flash Programming Tool before closing manufacturing."/>
+					<FpfMirroringFile value="" edit="true" visible="true" name="FPF Mirroring File" help_text="Enter a path to the FPF mirroring file. Note: This option will create a FPF configuration for TXE Firmware to emulate fuse configuration for testing purpose. This option will not program real fuses. Fuse values programmed here will not be used once manufacturing is closed. Real fuses should be programmed using Flash Programming Tool before closing manufacturing."/>
 					<CekConfiguration value="" edit="true" visible="true" name="CEK Configuration" help_text="Binary file to use for CEK Configuration. Must be exactly 256 bytes."/>
 				</TXE>
 				<FeaturesSupported name="Features Supported">

RomImage/fitc.ini

@@ -1,6 +1,6 @@
 [settings]
-LastFileUsed=BYT-I_DUAL_BOOT_TXE_KIT_RELEASE_1.1.0.1089.xml
-WindowPos=0,1,-1,-1,-1,-1,107,907,74,674
+LastFileUsed=C:\AAEON\BIOS\AAEON\BayTrail\RomImage\BayTrail_Desktop_8MB_TXE_1.375MB.xml
+WindowPos=0,1,-32000,-32000,-1,-1,107,1654,74,960
 WorkingDir=.
 SourceDir=.
 DestDir=.