417 lines
19 KiB
C
417 lines
19 KiB
C
//**********************************************************************
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//**********************************************************************
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//** **
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//** (C)Copyright 1985-2013, American Megatrends, Inc. **
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//** **
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//** All Rights Reserved. **
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//** **
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//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
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//** **
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//** Phone: (770)-246-8600 **
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//** **
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//**********************************************************************
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//**********************************************************************
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//**********************************************************************
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//<AMI_FHDR_START>
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//
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// Name: <F81866PeiIoTable.h>
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//
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// Description:
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// SIO init table in PEI phase. Any customers have to review below tables
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// for themselves platform and make sure each initialization is necessary.
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//
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// Notes:
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// In all tables, only fill with necessary setting. Don't fill with default
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//
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//<AMI_FHDR_END>
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//**********************************************************************
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#ifndef _F81866PeiIoTable_H_
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#define _F81866PeiIoTable_H_
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#ifdef __cplusplus
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extern "C" {
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#endif
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//----------------------------------------------------------------------
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// Include Files
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//----------------------------------------------------------------------
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#include "token.h"
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#include <Library/AmiSioPeiLib.h>
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IO_DECODE_DATA F81866PeiDecodeTable[]= {
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// -----------------------------
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//| BaseAdd | UID | Type |
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// -----------------------------
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{F81866_CONFIG_INDEX, 2, 0xFF},
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//Below decode is for recovery mode
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#if (defined(Recovery_SUPPORT) && (SerialRecovery_SUPPORT))
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#if (F81866_SERIAL_PORT1_PRESENT)
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{F81866_SERIAL_PORT1_BASE_ADDRESS, 0x01, dsUART},
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#endif
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#endif
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#if defined(Recovery_SUPPORT) && (Recovery_SUPPORT)
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#if (F81866_KEYBOARD_PRESENT)
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{0x60, 0, dsPS2K}, // KBC decode
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#endif
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#if (F81866_FLOPPY_PORT_PRESENT)
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{0x3F0, 0, dsFDC}, // FDC decode
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#endif
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#endif
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//Below decode is for SIO generic IO decode
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#if defined(F81866_TOTAL_BASE_ADDRESS) && (F81866_TOTAL_BASE_ADDRESS != 0)
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{F81866_TOTAL_BASE_ADDRESS, F81866_TOTAL_LENGTH, 0xFF},
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#endif
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// !!!!Attention!!!!This is necessary
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//OEM_TODO//OEM_TODO//OEM_TODO//OEM_TODO
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// If your com port number > 2 , you'd add more table for more com ports.
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{0x3E0, 0x10, 0xFF}, // 0x3E0~0x3F0 , open a IODecode section for UART3 4
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{0x2E0, 0x20, 0xFF}, // 0x2E0~0x2FF , open a IODecode section for UART5 6
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// Add more OEM IO decode below.
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};
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SIO_DEVICE_INIT_DATA F81866PeiInitTable[]= {
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// -----------------------------
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//| Addr | DataMask | DataValue |
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// -----------------------------
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//------------------------------------------------------------------
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// Enter Configuration Mode.
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//------------------------------------------------------------------
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{F81866_CONFIG_INDEX, 0x00, F81866_CONFIG_MODE_ENTER_VALUE},
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{F81866_CONFIG_INDEX, 0x00, F81866_CONFIG_MODE_ENTER_VALUE},
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//------------------------------------------------------------------
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// Before init all logical devices, program Global register if needed.
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//------------------------------------------------------------------
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//RayWu, ADD 2014/09/03 >>
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{F81866_CONFIG_INDEX, 0x00, 0x26},
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{F81866_CONFIG_DATA, 0x3F, F81866_CLOCK << 6},
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{F81866_CONFIG_INDEX, 0x00, 0x27},
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//{F81866_CONFIG_DATA, 0xFE, 0x00},
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{F81866_CONFIG_DATA, 0xDE, 0 | (GPIO_DEC_RANGE << 5)},
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//F81866_UART_DEFAULT++ >>>>>
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{F81866_CONFIG_INDEX, 0x00, 0x29},
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{F81866_CONFIG_DATA, 0x0F, 0x00},
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//F81866_UART_DEFAULT++ <<<<<
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#if (F81866_SERIAL_PORT3_PRESENT)
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{F81866_CONFIG_INDEX, 0x00, 0x29},
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{F81866_CONFIG_DATA, 0xCF, (F81866_UART3_FUNC_SEL << 4)},
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#endif
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#if (F81866_SERIAL_PORT4_PRESENT)
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{F81866_CONFIG_INDEX, 0x00, 0x29},
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{F81866_CONFIG_DATA, 0x3F, (F81866_UART4_FUNC_SEL << 6)},
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#endif
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{F81866_CONFIG_INDEX, 0x00, 0x27},
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{F81866_CONFIG_DATA, 0xF3, 0x00}, //GPIO_PROG_SEL[0] = 0
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//F81866_UART_DEFAULT++ >>>>>
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{F81866_CONFIG_INDEX, 0x00, 0x28},
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{F81866_CONFIG_DATA, 0x00, 0x60}, //Set to 0x60
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//F81866_UART_DEFAULT++ <<<<<
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#if (F81866_SERIAL_PORT5_PRESENT)
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{F81866_CONFIG_INDEX, 0x00, 0x28},
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{F81866_CONFIG_DATA, 0xB3, BIT6 | (F81866_UART5_FUNC_SEL << 2)},
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#endif
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#if (F81866_SERIAL_PORT6_PRESENT)
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{F81866_CONFIG_INDEX, 0x00, 0x28},
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{F81866_CONFIG_DATA, 0xBC, BIT6 | F81866_UART6_FUNC_SEL},
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#endif
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#if (F81866_PARALLEL_PORT_PRESENT)
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{F81866_CONFIG_INDEX, 0x00, 0x28},
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{F81866_CONFIG_DATA, 0xDF, 0x00},
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//FIX_LPT_MULITIFUNCION_PIN++ >>>>>
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{F81866_CONFIG_INDEX, 0x00, 0x2B},
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{F81866_CONFIG_DATA, 0xFC, 0x00},
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//FIX_LPT_MULITIFUNCION_PIN++ <<<<<
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#endif
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{F81866_CONFIG_INDEX, 0x00, 0x27},
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{F81866_CONFIG_DATA, 0xF3, 0x04}, //GPIO_PROG_SEL[0] = 1
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{F81866_CONFIG_INDEX, 0x00, 0x28},
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{F81866_CONFIG_DATA, 0xFC, (PIN76_EN << 1) | PIN71_EN},
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{F81866_CONFIG_INDEX, 0x00, 0x29},
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{F81866_CONFIG_DATA, 0xF0, (SCL_PIN76_EN << 3) | (SDA_PIN71_EN << 2) | (SDA_PIN68_EN << 1) | SCL_PIN67_EN},
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{F81866_CONFIG_INDEX, 0x00, 0x2B},
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{F81866_CONFIG_DATA, 0x1C, (GPIO67_EN << 7) | (GPIO66_EN << 6) | (GPIO65_EN << 5) | (FANIN3_EN << 1) | FANCTRL3_EN},
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{F81866_CONFIG_INDEX, 0x00, 0x27},
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{F81866_CONFIG_DATA, 0xF3, 0x00}, //GPIO_PROG_SEL[0] = 0
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{F81866_CONFIG_INDEX, 0x00, 0x2C},
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{F81866_CONFIG_DATA, 0xE0, (GPIO04_EN << 4) | (GPIO03_EN << 3) | (GPIO02_EN << 2) | (GPIO01_EN << 1) | GPIO00_EN},
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{F81866_CONFIG_INDEX, 0x00, 0x27},
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{F81866_CONFIG_DATA, 0xF3, 0x04}, //GPIO_PROG_SEL[0] = 1
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{F81866_CONFIG_INDEX, 0x00, 0x2C},
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{F81866_CONFIG_DATA, 0x10, (GPIO17_EN << 7) | (GPIO16_EN << 6) | (GPIO15_EN << 5) | (GPIO14_EN << 4) | (GPIO13_EN << 3) | (GPIO12_EN << 2) | (GPIO11_EN << 1) | GPIO10_EN},
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{F81866_CONFIG_INDEX, 0x00, 0x27},
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{F81866_CONFIG_DATA, 0xF3, 0x08}, //GPIO_PROG_SEL[0] = 2
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{F81866_CONFIG_INDEX, 0x00, 0x2C},
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{F81866_CONFIG_DATA, 0x00, (GPIO27_EN << 7) | (GPIO26_EN << 6) | (GPIO25_EN << 5) | (GPIO24_EN << 4) | (GPIO23_EN << 3) | (GPIO22_EN << 2) | (GPIO21_EN << 1) | GPIO20_EN},
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{F81866_CONFIG_INDEX, 0x00, 0x2D},
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{F81866_CONFIG_DATA, 0xF7, 0x00}, //Disable KB/MS wakeup function
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//RayWu, ADD 2014/09/03 <<
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//RayWu, ADD 2014/09/13 >>
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{F81866_CONFIG_INDEX, 0x00, F81866_LDN_SEL_REGISTER},
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{F81866_CONFIG_DATA, 0x00, F81866_LDN_GPIO},
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// Program Base Addr
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{F81866_CONFIG_INDEX, 0x00, F81866_BASE1_LO_REGISTER},
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{F81866_CONFIG_DATA, 0x00, (UINT8)(IO1B & 0xFF)},
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{F81866_CONFIG_INDEX, 0x00, F81866_BASE1_HI_REGISTER},
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{F81866_CONFIG_DATA, 0x00, (UINT8)(IO1B >> 8)},
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// Activate Device
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{F81866_CONFIG_INDEX, 0x00, F81866_ACTIVATE_REGISTER},
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{F81866_CONFIG_DATA, 0x00, F81866_ACTIVATE_VALUE},
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// {F81866_CONFIG_INDEX, 0x00, 0xF1},
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// {F81866_CONFIG_DATA, 0x00, GPIO0_VAL},
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// {F81866_CONFIG_INDEX, 0x00, 0xF3},
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// {F81866_CONFIG_DATA, 0x00, GPIO0_DRV_EN},
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// {F81866_CONFIG_INDEX, 0x00, 0xF0},
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// {F81866_CONFIG_DATA, 0x00, GPIO0_OE},
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//
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// {F81866_CONFIG_INDEX, 0x00, 0xE1},
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// {F81866_CONFIG_DATA, 0x00, GPIO1_VAL},
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// {F81866_CONFIG_INDEX, 0x00, 0xE3},
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// {F81866_CONFIG_DATA, 0x00, GPIO1_DRV_EN},
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// {F81866_CONFIG_INDEX, 0x00, 0xE0},
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// {F81866_CONFIG_DATA, 0x00, GPIO1_OE},
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//
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// {F81866_CONFIG_INDEX, 0x00, 0xD1},
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// {F81866_CONFIG_DATA, 0x00, GPIO2_VAL},
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// {F81866_CONFIG_INDEX, 0x00, 0xD3},
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// {F81866_CONFIG_DATA, 0x00, GPIO2_DRV_EN},
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// {F81866_CONFIG_INDEX, 0x00, 0xD0},
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// {F81866_CONFIG_DATA, 0x00, GPIO2_OE},
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//
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// {F81866_CONFIG_INDEX, 0x00, 0xC1},
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// {F81866_CONFIG_DATA, 0x00, GPIO3_VAL},
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// {F81866_CONFIG_INDEX, 0x00, 0xC3},
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// {F81866_CONFIG_DATA, 0x00, GPIO3_DRV_EN},
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// {F81866_CONFIG_INDEX, 0x00, 0xC0},
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// {F81866_CONFIG_DATA, 0x00, GPIO3_OE},
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//
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// {F81866_CONFIG_INDEX, 0x00, 0xB1},
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// {F81866_CONFIG_DATA, 0x00, GPIO4_VAL},
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// {F81866_CONFIG_INDEX, 0x00, 0xB3},
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// {F81866_CONFIG_DATA, 0x00, GPIO4_DRV_EN},
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// {F81866_CONFIG_INDEX, 0x00, 0xB0},
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// {F81866_CONFIG_DATA, 0x00, GPIO4_OE},
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//
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// {F81866_CONFIG_INDEX, 0x00, 0xA1},
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// {F81866_CONFIG_DATA, 0x00, GPIO5_VAL},
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// {F81866_CONFIG_INDEX, 0x00, 0xA3},
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// {F81866_CONFIG_DATA, 0x00, GPIO5_DRV_EN},
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// {F81866_CONFIG_INDEX, 0x00, 0xA0},
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// {F81866_CONFIG_DATA, 0x00, GPIO5_OE},
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//
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// {F81866_CONFIG_INDEX, 0x00, 0x91},
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// {F81866_CONFIG_DATA, 0x00, GPIO6_VAL},
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// {F81866_CONFIG_INDEX, 0x00, 0x93},
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// {F81866_CONFIG_DATA, 0x00, GPIO6_DRV_EN},
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// {F81866_CONFIG_INDEX, 0x00, 0x90},
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// {F81866_CONFIG_DATA, 0x00, GPIO6_OE},
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// {F81866_CONFIG_INDEX, 0x00, 0x81},
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// {F81866_CONFIG_DATA, 0x00, GPIO7_VAL},
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// {F81866_CONFIG_INDEX, 0x00, 0x83},
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// {F81866_CONFIG_DATA, 0x00, GPIO7_DRV_EN},
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// {F81866_CONFIG_INDEX, 0x00, 0x80},
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// {F81866_CONFIG_DATA, 0x00, GPIO7_OE},
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//
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// {F81866_CONFIG_INDEX, 0x00, 0x89},
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// {F81866_CONFIG_DATA, 0x00, GPIO8_VAL},
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// {F81866_CONFIG_INDEX, 0x00, 0x8B},
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// {F81866_CONFIG_DATA, 0x00, GPIO8_DRV_EN},
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// {F81866_CONFIG_INDEX, 0x00, 0x88},
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// {F81866_CONFIG_DATA, 0x00, GPIO8_OE},
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//RayWu, ADD 2014/09/13 <<
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//RayWu, ADD 2015/04/14 >>
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// All UART default as 128 byte FIFO
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{F81866_CONFIG_INDEX, 0x00, F81866_LDN_SEL_REGISTER},
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{F81866_CONFIG_DATA, 0x00, F81866_LDN_UART1},
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{F81866_CONFIG_INDEX, 0x00, 0xF6},
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{F81866_CONFIG_DATA, 0xFC, (BIT0 + BIT1)},
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{F81866_CONFIG_INDEX, 0x00, F81866_LDN_SEL_REGISTER},
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{F81866_CONFIG_DATA, 0x00, F81866_LDN_UART2},
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{F81866_CONFIG_INDEX, 0x00, 0xF6},
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{F81866_CONFIG_DATA, 0xFC, (BIT0 + BIT1)},
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{F81866_CONFIG_INDEX, 0x00, F81866_LDN_SEL_REGISTER},
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{F81866_CONFIG_DATA, 0x00, F81866_LDN_UART3},
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{F81866_CONFIG_INDEX, 0x00, 0xF0},
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{F81866_CONFIG_DATA, 0xFC, ((0x01 & F81866_UART3_LEVEL_EDGE_SHARE_MODE) << 1) | F81866_UART3_IRQ_SHARE},
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{F81866_CONFIG_INDEX, 0x00, 0xF6},
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{F81866_CONFIG_DATA, 0xF4, ((0x02 & F81866_UART3_LEVEL_EDGE_SHARE_MODE) << 2) | (BIT0 + BIT1)},
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{F81866_CONFIG_INDEX, 0x00, F81866_LDN_SEL_REGISTER},
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{F81866_CONFIG_DATA, 0x00, F81866_LDN_UART4},
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{F81866_CONFIG_INDEX, 0x00, 0xF0},
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{F81866_CONFIG_DATA, 0xFC, ((0x01 & F81866_UART4_LEVEL_EDGE_SHARE_MODE) << 1) | F81866_UART4_IRQ_SHARE},
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{F81866_CONFIG_INDEX, 0x00, 0xF6},
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{F81866_CONFIG_DATA, 0xF4, ((0x02 & F81866_UART4_LEVEL_EDGE_SHARE_MODE) << 2) | (BIT0 + BIT1)},
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{F81866_CONFIG_INDEX, 0x00, F81866_LDN_SEL_REGISTER},
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{F81866_CONFIG_DATA, 0x00, F81866_LDN_UART5},
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{F81866_CONFIG_INDEX, 0x00, 0xF0},
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{F81866_CONFIG_DATA, 0xFC, ((0x01 & F81866_UART5_LEVEL_EDGE_SHARE_MODE) << 1) | F81866_UART5_IRQ_SHARE},
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{F81866_CONFIG_INDEX, 0x00, 0xF6},
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{F81866_CONFIG_DATA, 0xF4, ((0x02 & F81866_UART5_LEVEL_EDGE_SHARE_MODE) << 2) | (BIT0 + BIT1)},
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{F81866_CONFIG_INDEX, 0x00, F81866_LDN_SEL_REGISTER},
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{F81866_CONFIG_DATA, 0x00, F81866_LDN_UART6},
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{F81866_CONFIG_INDEX, 0x00, 0xF0},
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{F81866_CONFIG_DATA, 0xFC, ((0x01 & F81866_UART6_LEVEL_EDGE_SHARE_MODE) << 1) | F81866_UART6_IRQ_SHARE},
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{F81866_CONFIG_INDEX, 0x00, 0xF6},
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{F81866_CONFIG_DATA, 0xF4, ((0x02 & F81866_UART6_LEVEL_EDGE_SHARE_MODE) << 2) | (BIT0 + BIT1)},
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//RayWu, ADD 2015/04/14 <<
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//RayWu, REMOVE 2014/09/03 >>
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// {F81866_CONFIG_INDEX, 0x00, 0x26},
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// {F81866_CONFIG_DATA, 0x3F, F81866_CLOCK << 6},
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// {F81866_CONFIG_INDEX, 0x00, 0x27},
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// {F81866_CONFIG_DATA, 0xFE, 0x00},
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//#if (F81866_SERIAL_PORT3_PRESENT)
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// {F81866_CONFIG_INDEX, 0x00, 0x29},
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// {F81866_CONFIG_DATA, 0xCF, 0x30},
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//#endif
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//#if (F81866_SERIAL_PORT4_PRESENT)
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// {F81866_CONFIG_INDEX, 0x00, 0x29},
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// {F81866_CONFIG_DATA, 0x3F, 0xC0},
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//#endif
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//#if (F81866_SERIAL_PORT5_PRESENT)
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// {F81866_CONFIG_INDEX, 0x00, 0x28},
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// {F81866_CONFIG_DATA, 0xB3, 0x4C},
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//#endif
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//#if (F81866_SERIAL_PORT6_PRESENT)
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// {F81866_CONFIG_INDEX, 0x00, 0x28},
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// {F81866_CONFIG_DATA, 0xBC, 0x43},
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//#endif
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//#if (F81866_PARALLEL_PORT_PRESENT)
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// {F81866_CONFIG_INDEX, 0x00, 0x28},
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// {F81866_CONFIG_DATA, 0xDF, 0x00},
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//#endif
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// // Enable PS/2 KB/MS Wake-up Function
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//#if (F81866_KEYBOARD_PRESENT)
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// {F81866_CONFIG_INDEX, 0x00, 0x2D},
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// {F81866_CONFIG_DATA, 0xF7, 0x0F},
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//#endif
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//RayWu, REMOVE 2014/09/03 <<
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//------------------------------------------------------------------
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// Initialize the Serial Port for debug useage. Default is COMA
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//------------------------------------------------------------------
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#if (defined(Recovery_SUPPORT) && (SerialRecovery_SUPPORT))
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#if (F81866_SERIAL_PORT1_PRESENT)
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// Select device
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{F81866_CONFIG_INDEX, 0x00, F81866_LDN_SEL_REGISTER},
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{F81866_CONFIG_DATA, 0x00, F81866_LDN_UART1},
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// Program Base Addr
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{F81866_CONFIG_INDEX, 0x00, F81866_BASE1_LO_REGISTER},
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{F81866_CONFIG_DATA, 0x00, (UINT8)(F81866_SERIAL_PORT1_BASE_ADDRESS & 0xFF)},
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{F81866_CONFIG_INDEX, 0x00, F81866_BASE1_HI_REGISTER},
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{F81866_CONFIG_DATA, 0x00, (UINT8)(F81866_SERIAL_PORT1_BASE_ADDRESS >> 8)},
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// Activate Device
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{F81866_CONFIG_INDEX, 0x00, F81866_ACTIVATE_REGISTER},
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{F81866_CONFIG_DATA, 0x00, F81866_ACTIVATE_VALUE},
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#endif
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#endif
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//------------------------------------------------------------------
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// Initialize the KeyBoard and floppy controller for Recovery
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//------------------------------------------------------------------
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#if defined(Recovery_SUPPORT) && (Recovery_SUPPORT)
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#if (F81866_KEYBOARD_PRESENT)
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// Seclect device KEYBOARD
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{F81866_CONFIG_INDEX, 0x00, F81866_LDN_SEL_REGISTER},
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{F81866_CONFIG_DATA, 0x00, F81866_LDN_PS2K},
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// Program Base Addr
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{F81866_CONFIG_INDEX, 0x00, F81866_BASE1_HI_REGISTER},
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{F81866_CONFIG_DATA, 0x00, 0x00},
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{F81866_CONFIG_INDEX, 0x00, F81866_BASE1_LO_REGISTER},
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{F81866_CONFIG_DATA, 0x00, 0x60},
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/*
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[Fintek Notes:it have no 0x62,0x63 registers]
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{F81866_CONFIG_INDEX, 0x00, F81866_BASE2_HI_REGISTER},
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{F81866_CONFIG_DATA, 0x00, 0x00},
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{F81866_CONFIG_INDEX, 0x00, F81866_BASE2_LO_REGISTER},
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{F81866_CONFIG_DATA, 0x00, 0x64},
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*/
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// Program Interrupt
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{F81866_CONFIG_INDEX, 0x00, F81866_IRQ1_REGISTER},
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{F81866_CONFIG_DATA, 0x00, 0x01},
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// Activate Device
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{F81866_CONFIG_INDEX, 0x00, F81866_ACTIVATE_REGISTER},
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{F81866_CONFIG_DATA, 0x00, F81866_ACTIVATE_VALUE},
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#else
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// Deactivate Device
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{F81866_CONFIG_INDEX, 0x00, F81866_LDN_SEL_REGISTER},
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{F81866_CONFIG_DATA, 0x00, F81866_LDN_PS2K},
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{F81866_CONFIG_INDEX, 0x00, F81866_ACTIVATE_REGISTER},
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{F81866_CONFIG_DATA, 0x00, F81866_DEACTIVATE_VALUE},
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#endif //F81866_KEYBOARD_PRESENT
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#if (F81866_FLOPPY_PORT_PRESENT)
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// Seclect device FLOPPY
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{F81866_CONFIG_INDEX, 0x00, F81866_LDN_SEL_REGISTER},
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{F81866_CONFIG_DATA, 0x00, F81866_LDN_FDC},
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// Program Base Addr
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{F81866_CONFIG_INDEX, 0x00, F81866_BASE1_HI_REGISTER},
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{F81866_CONFIG_DATA, 0x00, 0x03},
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{F81866_CONFIG_INDEX, 0x00, F81866_BASE1_LO_REGISTER},
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{F81866_CONFIG_DATA, 0x00, 0xF0},
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|
// Program Interrupt
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|
{F81866_CONFIG_INDEX, 0x00, F81866_IRQ1_REGISTER},
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{F81866_CONFIG_DATA, 0x00, 0x06},
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|
// Activate Device
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|
{F81866_CONFIG_INDEX, 0x00, F81866_ACTIVATE_REGISTER},
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{F81866_CONFIG_DATA, 0x00, F81866_ACTIVATE_VALUE},
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#endif //F81866_FLOPPY_PORT_PRESENT
|
|
#endif //#if defined(Recovery_SUPPORT) && (Recovery_SUPPORT == 1)
|
|
|
|
//------------------------------------------------------------------
|
|
// Program and initialize some logical device if needed.
|
|
//------------------------------------------------------------------
|
|
//F81866_PS2SWAP_Workaround++ >>>>>
|
|
// Seclect device KEYBOARD
|
|
{F81866_CONFIG_INDEX, 0x00, F81866_LDN_SEL_REGISTER},
|
|
{F81866_CONFIG_DATA, 0x00, F81866_LDN_PS2K},
|
|
{F81866_CONFIG_INDEX, 0x00, 0xFE},
|
|
{F81866_CONFIG_DATA, 0x00, 0x03},
|
|
//F81866_PS2SWAP_Workaround++ <<<<<
|
|
|
|
//F81866_WDTINIT_Miles++ >>>>>
|
|
#if (F81866_WDT_PRESENT)
|
|
{F81866_CONFIG_INDEX, 0x00, F81866_LDN_SEL_REGISTER},
|
|
{F81866_CONFIG_DATA, 0x00, F81866_LDN_WDT},
|
|
{F81866_CONFIG_INDEX, 0x00, 0xF5},
|
|
{F81866_CONFIG_DATA, 0xEF, 0x11}, // 25ms pulse, sec mode
|
|
{F81866_CONFIG_INDEX, 0x00, 0xFA},
|
|
{F81866_CONFIG_DATA, 0xEF, 0x01}, // WDT_CLK_SEL, 0: internal 1:external
|
|
#endif //F81866_WDT_PRESENT
|
|
//F81866_WDTINIT_Miles++ <<<<<
|
|
//------------------------------------------------------------------
|
|
// After init all logical devices, program Global register if needed.
|
|
//------------------------------------------------------------------
|
|
|
|
//------------------------------------------------------------------
|
|
// After init all logical devices, Exit Configuration Mode.
|
|
//------------------------------------------------------------------
|
|
{F81866_CONFIG_INDEX, 0x00, F81866_CONFIG_MODE_EXIT_VALUE},
|
|
|
|
};
|
|
|
|
/****** DO NOT WRITE BELOW THIS LINE *******/
|
|
#ifdef __cplusplus
|
|
}
|
|
#endif
|
|
|
|
#endif //_F81866PeiIoTable_H_
|
|
//**********************************************************************
|
|
//**********************************************************************
|
|
//** **
|
|
//** (C)Copyright 1985-2013, American Megatrends, Inc. **
|
|
//** **
|
|
//** All Rights Reserved. **
|
|
//** **
|
|
//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
|
|
//** **
|
|
//** Phone: (770)-246-8600 **
|
|
//** **
|
|
//**********************************************************************
|
|
//**********************************************************************
|